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PLL602-01OC

产品描述Low Phase Noise XO (24MHz to 50MHz)
文件大小197KB,共4页
制造商PLL (PhaseLink Corporation)
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PLL602-01OC概述

Low Phase Noise XO (24MHz to 50MHz)

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PLL602-01
Low Phase Noise XO (24MHz to 50MHz)
FEATURES
Low phase noise XO output for the 24MHz to
50MHz range (-135 dBc at 10kHz offset).
12 to 25MHz crystal input.
Integrated crystal load capacitor: no external
load capacitor required.
Low jitter (RMS): 3ps period jitter (1 sigma).
Selectable High Drive (30mA) or Standard Drive
(10mA) output.
3.3V operation.
Available in 8-Pin TSSOP or SOIC.
PIN CONFIGURATION
CLK
VDD
OE^
XIN
1
2
3
4
8
7
6
5
GND
GND
N/C
XOUT
^: Denotes internal pull-up
OUTPUT RANGE
DESCRIPTION
The PLL602-01 is a low cost, high performance and
low phase noise XO, providing less than -135dBc at
10kHz offset in the 24MHz to 50MHz operating
range. The very low jitter (3ps RMS period jitter)
makes this chip ideal for applications requiring clean
reference frequency sources. Input crystal can range
from 12 to 25MHz (fundamental resonant mode).
MULTIPLIER
x2
FREQUENCY
RANGE
24 - 50MHz
OUTPUT
BUFFER
CMOS
PLL602-01
BLOCK DIAGRAM
VCO
Divider
Reference
Divider
Phase
Comparator
Charge
Pump
Loop
Filter
VCO
CLK
XIN
XOUT
XTAL
OSC
OE
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1

 
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