Freescale Semiconductor, Inc.
HC05JB4G
68HC05JB4
68HC705JB4
Freescale Semiconductor, Inc...
SPECIFICATION
(General Release)
February 24, 1999
Semiconductor Products Sector
Motorola reserves the right to make changes without further notice to any products
to improve reliability, function or design. Motorola does not assume any liability arisi
of the application or use of any product or circuit described herein; neither does it c
any license under its patent rights nor the rights of others. Motorola products a
designed, intended, or authorized for use as components in systems intended for su
implant into the body, or other applications intended to support or sustain life, or f
other application in which the failure of the Motorola product could create a sit
where personal injury or death may occur. Should Buyer purchase or use Mo
products for any such unintended or unauthorized application, Buyer shall indemni
hold Motorola and its officers, employees, subsidiaries, affiliates, and distri
harmless against all claims, costs, damages, and expenses, and reasonable at
fees arising out of, directly or indirectly, any claim of personal injury or death asso
with such unintended or unauthorized use, even if such claim alleges that Motoro
negligent regarding the design or manufacture of the part.
©
Motorola, Inc., 1999
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Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
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Freescale Semiconductor, Inc.
February 24, 1999
GENERAL RELEASE SPECIFIC
TABLE OF CONTENTS
Section
SECTION 1
GENERAL DESCRIPTION
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
1.4.9
Freescale Semiconductor, Inc...
FEATURES ....................................................................................................
MASK OPTIONS............................................................................................
MCU STRUCTURE........................................................................................
FUNCTIONAL PIN DESCRIPTION................................................................
V
DD
AND V
SS
............................................................................................
OSC1, OSC2 .............................................................................................
RESET.......................................................................................................
IRQ (MASKABLE INTERRUPT REQUEST)..............................................
V3.3 ...........................................................................................................
D+ and D– .................................................................................................
PA0-PA7 ....................................................................................................
PB0-PB4 ....................................................................................................
PC0-PC5....................................................................................................
SECTION 2
MEMORY
2.1
2.2
2.3
2.4
I/O AND CONTROL REGISTERS .................................................................
RAM ...............................................................................................................
ROM...............................................................................................................
I/O REGISTERS SUMMARY .........................................................................
SECTION 3
CENTRAL PROCESSING UNIT
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
REGISTERS ..................................................................................................
ACCUMULATOR (A)......................................................................................
INDEX REGISTER (X) ...................................................................................
STACK POINTER (SP) ..................................................................................
PROGRAM COUNTER (PC) .........................................................................
CONDITION CODE REGISTER (CCR) .........................................................
Half Carry Bit (H-Bit) ..................................................................................
Interrupt Mask (I-Bit) ..................................................................................
Negative Bit (N-Bit) ....................................................................................
Zero Bit (Z-Bit) ...........................................................................................
Carry/Borrow Bit (C-Bit) .............................................................................
SECTION 4
INTERRUPTS
4.1
4.2
4.3
4.4
INTERRUPT VECTORS ................................................................................
INTERRUPT PROCESSING..........................................................................
RESET INTERRUPT SEQUENCE ................................................................
SOFTWARE INTERRUPT (SWI) ...................................................................
MC68HC05JB4
REV 2
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Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
February 24, 1999
TABLE OF CONTENTS
Section
4.5
HARDWARE INTERRUPTS ..........................................................................
4.5.1
External Interrupt IRQ................................................................................
4.5.2
External Interrupt IRQ2..............................................................................
4.5.3
IRQ Control/Status Register (ICSR) - $0A.................................................
4.5.4
Port A External Interrupts (PA0-PA3, by mask option) ..............................
4.5.5
Timer1 Interrupt (TIMER1).........................................................................
4.5.6
USB Interrupt (USB) ..................................................................................
4.5.7
MFT Interrupt (MFT) ..................................................................................
Freescale Semiconductor, Inc...
SECTION 5
RESETS
5.1
POWER-ON RESET ......................................................................................
5.2
EXTERNAL RESET .......................................................................................
5.3
INTERNAL RESETS ......................................................................................
5.3.1
Power-On Reset (POR) .............................................................................
5.3.2
USB Reset .................................................................................................
5.3.3
Computer Operating Properly (COP) Reset ..............................................
5.3.4
Low Voltage Reset (LVR) ..........................................................................
5.3.5
Illegal Address Reset.................................................................................
SECTION 6
LOW POWER MODES
6.1
6.2
6.3
STOP MODE..................................................................................................
WAIT MODE ..................................................................................................
DATA-RETENTION MODE............................................................................
SECTION 7
INPUT/OUTPUT PORTS
7.1
7.2
7.2.1
7.2.2
7.2.3
7.3
7.3.1
7.3.2
7.3.3
7.4
7.4.1
7.4.2
SLOW FALLING-EDGE OUTPUT DRIVER...................................................
PORT-A..........................................................................................................
Port-A Data Register..................................................................................
Port-A Data Direction Register ..................................................................
Port-A Pull-up Control Register .................................................................
PORT-B..........................................................................................................
Port-B Data Register..................................................................................
Port-B Data Direction Register ..................................................................
Port-B Pull-up Control Register .................................................................
PORT-C .........................................................................................................
Port-C Data Register .................................................................................
Port-C Data Direction Register ..................................................................
MOTOROLA
ii
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MC68H
Freescale Semiconductor, Inc.
February 24, 1999
GENERAL RELEASE SPECIFIC
TABLE OF CONTENTS
Section
SECTION 8
MULTI-FUNCTION TIMER
8.1
8.2
8.3
8.3.1
8.3.2
8.4
8.5
Freescale Semiconductor, Inc...
OVERVIEW....................................................................................................
COMPUTER OPERATING PROPERLY (COP) WATCHDOG ......................
MFT REGISTERS ..........................................................................................
Timer Counter Register (TCNT) $09 .........................................................
Timer Control/Status Register (TCSR) $08 ...............................................
OPERATION DURING STOP MODE ............................................................
COP CONSIDERATION DURING STOP MODE...........................................
SECTION 9
16-BIT TIMER
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
TIMER REGISTERS (TMRH, TMRL).............................................................
ALTERNATE COUNTER REGISTERS (ACRH, ACRL) ................................
INPUT CAPTURE REGISTERS ....................................................................
OUTPUT COMPARE REGISTERS ...............................................................
TIMER CONTROL REGISTER (TCR) ...........................................................
TIMER STATUS REGISTER (TSR)...............................................................
TIMER OPERATION DURING WAIT MODE.................................................
TIMER OPERATION DURING STOP MODE ................................................
SECTION 10
UNIVERSAL SERIAL BUS MODULE
10.1 FEATURES ....................................................................................................
10.2 OVERVIEW....................................................................................................
10.2.1 USB Protocol .............................................................................................
10.2.2 Reset Signaling..........................................................................................
10.2.3 Suspend.....................................................................................................
10.2.4 Resume After Suspend..............................................................................
10.2.5 Low Speed Device................................................................................... 1
10.3 CLOCK REQUIREMENTS........................................................................... 1
10.4 HARDWARE DESCRIPTION....................................................................... 1
10.4.1 Voltage Regulator .................................................................................... 1
10.4.2 USB Transceiver...................................................................................... 1
10.4.3 Receiver Characteristics.......................................................................... 1
10.4.4 USB Control Logic ................................................................................... 1
10.5 I/O REGISTER DESCRIPTION ................................................................... 1
10.5.1 USB Address Register (UADDR)............................................................. 1
10.5.2 USB Interrupt Register 0 (UIR0) .............................................................. 1
10.5.3 USB Interrupt Register 1 (UIR1) .............................................................. 1
10.5.4 USB Control Register 0 (UCR0) .............................................................. 1
10.5.5 USB Control Register 1 (UCR1) .............................................................. 1
10.5.6 USB Control Register 2 (UCR2) .............................................................. 1
MC68HC05JB4
REV 2
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