Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33883/D
Rev 6.0, 01/2004
33883
H-Bridge Gate Driver IC
The 33883 is an H-bridge gate driver (also known as a full-bridge predriver)
IC with integrated charge pump and independent high- and low-side gate
driver channels. The gate driver channels are independently controlled by four
separate input terminals, thus allowing the device to be optionally configured
as two independent high-side gate drivers and two independent low-side gate
drivers. The low-side channels are referenced to ground. The high-side
channels are floating.
H-BRIDGE GATE DRIVER IC
Freescale Semiconductor, Inc...
The gate driver outputs can source and sink up to 1.0 A peak current
pulses, permitting large gate-charge MOSFETs to be driven and/or high Pulse
Width Modulation (PWM) frequencies to be utilized. A linear regulator is
incorporated, providing a 15 V typical gate supply to the low-side gate drivers.
Features
• V
CC
Operating Voltage Range from 5.5 V up to 55 V
• V
CC2
Operating Voltage Range from 5.5 V up to 28 V
•
•
•
•
•
•
•
CMOS/LSTTL Compatible I/O
1.0 A Peak Gate Driver Current
Built-In High-Side Charge Pump
Undervoltage Lockout (UVLO)
Overvoltage Lockout (OVLO)
Global Enable with <10
µA
Sleep Mode
Supports PWM up to 100 kHz
DW SUFFIX
CASE 751D-06
20-TERMINAL SOICW
ORDERING INFORMATION
Device
MC33883DW/R2
Temperature
Range (T
A
)
-40°C to 125°C
Package
20 SOICW
33883
Simplified Application Diagram
Simplified Application Diagram
VBAT VBOOST
33883
VCC
VCC2
G_EN
C1
C2
MCU
CP_OUT
LR_OUT
GATE_HS1
SRC_HS1
GATE_LS1
GATE_HS2
IN_HS1
IN_LS1
IN_HS2
IN_LS2
SRC_HS2
GATE_LS2
GND
DC
Motor
© Motorola, Inc. 2004
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C
CP
C1
V
CC,
V
CC2
Undervoltage/
Overvoltage
Detection
V
CC
V
CC
V
DD
EN
GND
G_EN
GND2 V
CC2
V
CC2
EN
Linear
Reg
+5.0 V
+14.5 V
LR_OUT
Charge
Pump
C1
C2
V
POS
CP_OUT
V
DD
V
CC
C2
V
CC2
V
CC2
5.5 V– 28 V
V
CC
C
CP_OUT
5.5 V –
55 V
CP_OUT
C
LR_OUT
LR_OUT
Freescale Semiconductor, Inc...
GND
GND_A
GND2
HIGH- AND LOW-SIDE
CONTROL WITH CHARGE PUMP
BRG_EN
IN_HS1
T
SD
1
Control
and
Logic
V
DD
/V
POS
Level Shift
Pulse
Generator
V
CC
CP_OUT
OUT
IN
Output
Driver
GATE_HS1
SRC_HS1
HIGH-SIDE CHANNEL
BRG_EN
IN_LS1
T
SD
1
Control
and
Logic
T
SD
1
Thermal Shutdown
LR_OUT
V
DD
/V
CC
Level Shift
Pulse
Generator
IN
Output
Driver
OUT
GATE_LS1
LOW-SIDE CHANNEL
GND1
BRG_EN
IN_HS2
T
SD
2
Control
and
Logic
V
DD
/V
POS
Level Shift
Pulse
Generator
V
CC
CP_OUT
OUT
GATE_HS2
SRC_HS2
IN
Output
Driver
HIGH-SIDE CHANNEL
BRG_EN
IN_LS2
T
SD
2
Control
and
Logic
V
DD
/V
CC
Level Shift
Pulse
Generator
T
SD
2
Thermal Shutdown
LR_OUT
IN
Output
Driver
OUT
GATE_LS2
LOW-SIDE CHANNEL
GND2
GND1 GND2
GND_A
Figure 1. 33883 Simplified Internal Block Diagram
33883
2
MOTOROLA ANALOG
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INTEGRATED CIRCUIT DEVICE DATA
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V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
G_EN
SRC_HS2
GATE_HS2
IN_HS2
IN_LS2
GATE_LS2
GND2
C1
GND_A
V
CC2
C2
CP_OUT
SRC_HS1
GATE_HS1
IN_HS1
IN_LS1
GATE_LS1
GND1
LR_OUT
TERMINAL FUNCTION DESCRIPTION
Terminal
Terminal Name
V
CC
Formal Name
Supply Voltage 1
Charge Pump Capacitor
Charge Pump Out
Source 1 Output High Side
Gate 1 Output High Side
Input High Side 1
Input Low Side 1
Gate 1 Output Low Side
Ground 1
Linear Regulator Output
Supply Voltage 2
Analog Ground
Charge Pump Capacitor
Ground 2
Gate 2 Output Low Side
Input Low Side 2
Input High Side 2
Gate 2 Output High Side
Source 2 Output High Side
Global Enable
Device power supply 1.
External capacitor for internal charge pump.
External reservoir capacitor for internal charge pump.
Source of high-side 1 MOSFET
Gate of high-side 1 MOSFET.
Logic input control of high-side 1 gate (i.e., IN_HS1 logic HIGH = GATE_HS1
HIGH).
Logic input control of low-side 1 gate (i.e., IN_LS1 logic HIGH = GATE_LS1
HIGH).
Gate of low-side 1 MOSFET.
Device ground 1.
Output of internal linear regulator.
Device power supply 2.
Device analog ground.
External capacitor for internal charge pump.
Device ground 2.
Gate of low-side 2 MOSFET.
Logic input control of low-side 2 gate (i.e., IN_LS2 logic HIGH = GATE_LS2
HIGH).
Logic input control of high-side 2 gate (i.e., IN_HS2 logic HIGH = GATE_HS2
HIGH).
Gate of high-side 2 MOSFET.
Source of high-side 2 MOSFET.
Logic input Enable control of device (i.e., G_EN logic HIGH = Full Operation,
G_EN logic LOW = Sleep Mode).
Definition
Freescale Semiconductor, Inc...
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
C2
CP_OUT
SRC_HS1
GATE_HS1
IN_HS1
IN_LS1
GATE_LS1
GND1
LR_OUT
V
CC2
GND_A
C1
GND2
GATE_LS2
IN_LS2
IN_HS2
GATE_HS2
SRC_HS2
G_EN
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33883
3
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MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted.
Rating
Supply Voltage 1
Supply Voltage 2 (Note 1)
Linear Regulator Output Voltage
High-Side Floating Supply Absolute Voltage
High-Side Floating Source Voltage
High-Side Source Current from CP_OUT in Switch ON State
High-Side Gate Voltage
Symbol
V
CC
V
CC2
V
LR_OUT
V
CP_OUT
V
SRC_HS
I
S
V
GATE_HS
V
GATE_HS
- V
SRC_HS
V
CP_OUT
- V
GATE_HS
V
GATE_LS
V
G_EN
V
IN
V
C1
V
C2
Value
-0.3 to 65
-0.3 to 35
-0.3 to 18
-0.3 to 65
-1.0 to 65
250
-0.3 to 65
-0.3 to 20
-0.3 to 65
-0.3 to 17
-0.3 to 35
-0.3 to 10
-0.3 to V
LR_OUT
-0.3 to 65
Unit
V
V
V
V
V
mA
V
V
V
V
V
V
V
V
V
V
ESD1
V
ESD2
P
D
R
θJA
T
J
T
STG
T
SOLDER
±1500
±130
Freescale Semiconductor, Inc...
High-Side Gate Source Voltage
High-Side Floating Supply Gate Voltage
Low-Side Gate Voltage
Wake-Up Voltage
Logic Input Voltage
Charge Pump Capacitor Voltage
Charge Pump Capacitor Voltage
ESD Voltage
Human Body Model on All Pins (V
CC
and V
CC2
as Two Power
Supplies) (Note 2)
Machine Model (Note 3)
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @ 25°C
Thermal Resistance (Junction to Ambient)
Operating Junction Temperature
Storage Temperature
Terminal Soldering Temperature (Note 4)
1.25
100
-40 to 150
-65 to 150
240
W
°C/W
°C
°C
°C
Notes
1. V
CC2
can sustain load dump pulse of 40 V, 400 ms, 2.0
Ω.
2. ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
=100 pF, R
ZAP
=1500
Ω).
3.
4.
ESD2 testing is performed in accordance with the Machine Model (C
ZAP
=200 pF, R
ZAP
=0
Ω).
Terminal soldering temperature limit is for 10 second maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
33883
4
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INTEGRATED CIRCUIT DEVICE DATA
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STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions V
CC
= 12 V, V
CC2
= 12 V, C
CP
= 33 nF, G_EN = 4.5 V unless otherwise noted. Typical values
for T
A
= 25°C and min/max values for T
A
= -40°C to 125°C unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
OPERATING CONDITIONS
Supply Voltage 1 for Output High-Side Driver and Charge Pump
Supply Voltage 2 for Linear Regulation
High-Side Floating Supply Absolute Voltage
V
CC
V
CC2
V
CP_OUT
5.5
5.5
V
CC
+4
–
–
–
55
28
V
CC
+11
but < 65
V
V
V
LOGIC
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Logic 1 Input Voltage (IN_LS and IN_HS)
Logic 0 Input Voltage (IN_LS and IN_HS)
Logic 1 Input Current
V
IN
= 5.0 V
Wake-Up Input Voltage (G_EN)
Wake-Up Input Current (G_EN)
V
G_EN
= 14 V
Wake-Up Input Current (G_EN)
V
G_EN
= 28 V
V
IH
V
IL
I
IN+
2.0
–
–
–
10
0.8
V
V
µA
200
V
G_EN
I
G_EN
–
I
G_EN2
–
4.5
–
5.0
1000
V
CC2
500
mA
V
µA
200
–
1.5
LINEAR REGULATOR
Linear Regulator
V
LR_OUT
@ V
CC2
from 15 V to 28 V, I
LOAD
from 0 mA to 20 mA
V
LR_OUT
@ I
LOAD
= 20 mA
V
LR_OUT
@ I
LOAD
= 20 mA, V
CC2
= 5.5 V, V
CC
=
5.5 V
V
LR_OUT
12.5
V
CC2
-1.5
4.0
–
–
–
16.5
–
–
V
CHARGE PUMP
Charge Pump Output Voltage, Reference to V
CC
V
CC
= 12 V, I
LOAD
= 0 mA, C
CP_OUT
= 1.0
µF
V
CC
= 12 V, I
LOAD
= 7.0 mA, C
CP_OUT
= 1.0
µF
V
CC2
= V
CC
= 5.5 V, I
LOAD
= 0 mA, C
CP_OUT
= 1.0
µF
V
CC2
= V
CC
= 5.5 V, I
LOAD
= 7.0 mA, C
CP_OUT
= 1.0
µF
V
CC
= 55 V, I
LOAD
= 0 mA, C
CP_OUT
= 1.0
µF
V
CC
= 55 V, I
LOAD
= 7.0 mA, C
CP_OUT
= 1.0
µF
Peak Current Through Pin C1 Under Rapidly Changing V
CC
Voltages (see
Figure 11,
page 14)
Minimum Peak Voltage at Pin C1 Under Rapidly Changing V
CC
Voltages (see
Figure 11,
page 14)
I
C1
V
C1
min
V
CP_OUT
7.5
7.0
2.3
1.8
7.5
7.0
–
–
–
–
–
–
–
–
–
–
–
–
A
-2.0
-1.5
–
–
2.0
V
–
V
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33883
5