DATASHEET
CA5260, CA5260A
3MHz, BiMOS Microprocessor Operational Amplifiers with MOSFET Input/CMOS
Output
The CA5260A and CA5260 are integrated-circuit operational
amplifiers that combine the advantage of both CMOS and
bipolar transistors on a monolithic chip. The CA5260 series
circuits are dual versions of the popular CA5160 series.
They are designed and guaranteed to operate in
microprocessor or logic systems that use +5V supplies.
Gate-protected P-Channel MOSFET (PMOS) transistors are
used in the input circuit to provide very-high-input
impedance, very-low-input current, and exceptional speed
performance. The use of PMOS field-effect transistors in the
input stage results in common-mode input-voltage capability
down to 0.5V below the negative-supply terminal, an
important attribute in single-supply applications.
A complementary-symmetry MOS (CMOS) transistor-pair,
capable of swinging the output voltage to within 10mV of
either supply-voltage terminal (at very high values of load
impedance), is employed as the output circuit.
The CA5260 Series circuits operate at supply voltages
ranging from 4.5V to 16V, or ±2.25V to ±8V when using split
supplies.
The CA5260, CA5260A have guaranteed specifications for
5V operation over the full military temperature range of
-55°C to +125°C.
FN1929
Rev 8.00
August 3, 2010
Features
• MOSFET Input Stage provides
- Very High Z
I
. . . . . . . . . . . . . 1.5T (1.5 x 10
12
)
(Typ)
- Very Low I
I
. . . . . . . . . . . . . 5pA (Typ) at 15V Operation
2pA (Typ) at 5V Operation
• Ideal for Single Supply Applications
• Common Mode Input Voltage Range Includes
Negative Supply Rail; Input Terminals Can be
Swung 0.5V Below Negative Supply Rail
• CMOS Output Stage Permits Signal Swing to Either (or
Both) Supply Rails
• CA5260A, CA5260 Have Full Military Temperature Range
Guaranteed Specifications for V+ = 5V
• CA5260A, CA5260 are Guaranteed to Operate Down to
4.5V for A
OL
• Fully Guaranteed to Operate from -55°C to +125°C at
V+ = 5V, V- = GND
• Pb-Free Available (RoHS Compliant)
Applications
• Ground Referenced Single Supply Amplifiers
• Fast Sample-Hold Amplifiers
• Long Duration Timers/Monostables
Pinout
CA5260, CA5260A
(8 LD SOIC)
TOP VIEW
OUTPUT (A)
INV. INPUT (A)
NON INV. INPUT (A)
V-
1
A
2
3
4
- +
B
+ -
6
5
INV. INPUT (B)
NON INV. INPUT (B)
7
OUTPUT (B)
8
• Ideal Interface with Digital CMOS
• High Input Impedance Wideband Amplifiers
V+
• Voltage Followers (e.g., Follower for Single Supply D/A
Converter)
• Voltage Regulators (Permits Control of Output Voltage
Down to 0V)
• Wien Bridge Oscillators
• Voltage Controlled Oscillators
• Photo Diode Sensor Amplifiers
• 5V Logic Systems
• Microprocessor Interface
FN1929 Rev 8.00
August 3, 2010
Page 1 of 7
CA5260, CA5260A
Ordering Information
PART NUMBER
(Note 3)
CA5260AM96 (Note 1)
CA5260MZ96 (Note 2)
CA5260M (Notes 1)
CA5260MZ (Note 2)
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
CA5260, CA5260A.
For more information on MSL please see
techbrief
TB363.
5260A
CA5260 MZ
5260
CA5260 MZ
PART
MARKING
TEMP. RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
PACKAGE
(Pb-Free)
8 Ld SOIC (Tape and Reel)
8 Ld SOIC
8 Ld SOIC (Tape and Reel)
8 Ld SOIC
M8.15
M8.15
M8.15
M8.15
PKG.
DWG. #
FN1929 Rev 8.00
August 3, 2010
Page 2 of 7
CA5260, CA5260A
Absolute Maximum Ratings
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 16V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 4). . . . . . . . . . . . . . . . Indefinite
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Thermal Information
Thermal Resistance (Typical, Note 5)
JA
(°C/W)
157
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175°C
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. Short circuit may be applied to ground or to either supply.
5.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
Input Resistance
Input Capacitance
Unity Gain Crossover Frequency
Slew Rate
Transient Response
Rise Time
Overshoot
Typical Values Intended Only for Design Guidance, V+ = 5V, V- = 0V, T
A
= +25°C, Unless Otherwise Specified
TYPICAL VALUES
SYMBOL
RI
C
I
f
T
SR
V
OUT
= 2.5V
P-P
C
L
= 25pF, R
L
= 2k
(Voltage Follower)
f = 1MHz
TEST CONDITIONS
CA5260
1.5
4.3
3
5
CA5260A
1.5
4.3
3
5
UNITS
T
pF
MHz
V/µs
t
r
OS
t
S
0.09
10
0.09
10
1.8
µs
%
µs
Settling Time (To <0.1%, V
IN
= 4V
P-P
)
C
L
= 25pF, R
L
= 2k
(Voltage Follower)
1.8
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Common Mode Rejection
Ratio
Common Mode Input
Voltage Range
Power Supply Rejection
Ratio
Large Signal Voltage Gain
(Note 6)
T
A
= +25°C, V+ = 5V, V- = 0V
TEST
CONDITIONS
V
O
= 2.5V
V
O
= 2.5V
V
O
= 2.5V
V
CM
= 0V to 1V
V
CM
= 0V to 2.5V
V
lCR
+
V
lCR
-
PSRR
A
OL
V+
= 1V;
V-
= 1V
R
L
=
, V
O
= 0.5V to 4V
R
L
= 10k,
V
O
= 0.5V to 3.6V
CA5260
MIN
-
-
-
70
50
2.5
-
70
-
80
1.75
1.70
TYP
2
1
2
85
55
3
-0.5
84
111
86
2.2
2
MAX
15
10
15
-
-
-
0
-
-
-
-
-
MIN
-
-
-
74
50
2.5
-
75
-
83
1.75
1.70
CA5260A
TYP
1.5
1
2
85
55
3
-0.5
84
113
86
2.2
2
MAX
4
10
15
-
-
-
0
-
-
-
-
-
UNITS
mV
pA
pA
dB
dB
V
V
dB
dB
dB
mA
mA
SYMBOL
V
IO
I
IO
I
I
CMRR
Source Current
Sink Current
I
SOURCE
I
SINK
V
O
= 0V
V
O
= 5V
FN1929 Rev 8.00
August 3, 2010
Page 3 of 7
CA5260, CA5260A
Electrical Specifications
PARAMETER
Output Voltage
T
A
= +25°C, V+ = 5V, V- = 0V
(Continued)
TEST
CONDITIONS
R
L
=
CA5260
MIN
4.99
-
R
L
= 10k
4.4
-
R
L
= 2k
3
-
V
O
= 0V
V
O
= 2.5V
NOTE:
6. For V+ = 4.5V and V- = GND; V
OUT
= 0.5V to 3.2V at R
L
= 10k
-
-
TYP
5
0
4.7
0
3.4
0
1.60
1.80
MAX
-
0.01
-
0.01
-
0.01
2.0
2.25
MIN
4.99
-
4.4
-
3
-
-
-
CA5260A
TYP
5
0
4.7
0
3.4
0
1.60
1.80
MAX
-
0.01
-
0.01
-
0.01
2.0
2.25
UNITS
V
V
V
V
V
V
mA
mA
SYMBOL
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
OM
+
V
OM
-
Supply Current
I
SUPPLY
Electrical Specifications
T
A
= -55°C to +125°C, V+ = 5V, V- = 0V
CA5260
CA5260A
MAX
MIN
(Note 8) (Note 8)
20
10
15
-
-
-
0
-
-
-
-
-
-
0.01
-
0.01
-
0.01
2.2
2.35
-
-
-
65
50
2.5
-
62
70
60
1.3
1.2
4.99
-
4.2
-
2.5
-
-
-
TYP
2
1
2
78
60
3
-0.5
65
78
65
1.6
1.4
5
0
4.4
0
2.7
0
1.65
1.95
MAX
(Note 8)
15
10
15
-
-
-
0
-
-
-
-
-
-
0.01
-
0.01
-
0.01
2.2
2.35
UNITS
mV
nA
nA
dB
dB
V
V
dB
dB
dB
mA
mA
V
V
V
V
V
V
mA
mA
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Common Mode Rejection Ratio
SYMBOL
V
IO
I
IO
I
I
CMRR
TEST
CONDITIONS
V
O
= 2.5V
V
O
= 2.5V
V
O
= 2.5V
V
CM
= 0 to 1V
V
CM
= 0 to 2.5V
MIN
(Note 8)
-
-
-
60
50
2.5
-
TYP
3
1
2
78
60
3
-0.5
65
78
65
1.6
1.4
5
0
4.4
0
2.7
0
1.65
1.95
Common Mode Input Voltage
Range
Power Supply Rejection Ratio
Large Signal Voltage Gain (Note 7)
V
lCR
+
V
lCR
-
PSRR
A
OL
V+
= 1V;
V-
= 1V
R
L
=
,
V
O
= 0.5 to 4V
R
L
= 10k,
V
O
= 0.5 to 3.6V
60
70
60
1.3
1.2
4.99
-
Source Current
Sink Current
Output Voltage
I
SOURCE
I
SINK
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
O
= 0V
V
O
= 5V
R
L
=
R
L
= 10k
4.2
-
R
L
= 2k
2.5
-
Supply Current
I
SUPPLY
V
O
= 0V
V
O
= 2.5V
-
-
NOTES:
7. For V+ = 4.5V and V- = GND; V
OUT
= 0.5V to 3.2V at R
L
= 10k
8.
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN1929 Rev 8.00
August 3, 2010
Page 4 of 7
CA5260, CA5260A
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Large Signal Voltage Gain
Each Amplifier at T
A
= +25°C, V+ = 15V, V- = 0V, Unless Otherwise Specified
TEST
CONDITIONS
V
S
=
7.5
V
S
=
7.5
V
S
=
7.5
V
O
= 10V
P-P
,
R
L
= 10k
CA5260
MIN
-
-
-
40
92
70
10
V
S
=
7.5
R
L
= 10k
R
L
=
-
11
-
14.99
-
V
O
= 7.5V
12
12
V
O
(Amp A) = 7.5V
V
O
(Amp B) = 7.5V
V
O
(Amp A) = 0V
V
O
(Amp B) = 0V
V
O
(Amp A) = 0V V
O
(Amp B) = 7.5V
Input Offset Voltage
Temperature Drift
Crosstalk
V
IO
/T
f = 1kHz
-
-
-
-
-
TYP
6
0.5
5
320
110
90
-0.5 to 12
32
13.3
0.002
15
0
22
20
9
1.2
5
8
120
MAX
15
30
50
-
-
-
0
320
-
0.01
-
0.01
45
45
16.5
4
9.5
-
-
MIN
-
-
-
40
92
80
10
-
11
-
14.99
-
12
12
-
-
-
-
-
CA5260A
TYP
2
0.5
5
320
110
95
-0.5 to 12
32
13.3
0.002
15
0
22
20
9
1.2
5
6
120
MAX
5
20
30
-
-
-
0
150
-
0.01
-
0.01
45
45
16.5
4
9.5
-
-
UNITS
mV
pA
pA
kV/V
dB
dB
V
µV/V
V
V
V
V
mA
mA
mA
mA
mA
µV/
o
C
dB
SYMBOL
V
IO
I
IO
I
I
A
OL
Common Mode Rejection Ratio
Common Mode Input Voltage
Range
Power Supply Rejection Ratio,
V
IO
/
V
Maximum Output Voltage
CMRR
V
lCR
PSRR
V
OM
+
V
OM
-
V
OM
+
V
OM
-
Maximum Output Current
I
OM
+
(Source)
I
OM
- (Sink)
Total Supply Current, R
L
=
I+
FN1929 Rev 8.00
August 3, 2010
Page 5 of 7
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