®
STPAC01F2
IPAD™
RF DETECTOR FOR
POWER AMPLIFIER CONTROL
MAIN PRODUCT CHARACTERISTICS
The STPAC01F2 has two outputs, one for the sig-
nal detection and another one for the temperature
compensation:
■
■
■
■
V
DCout
= 0.88 V at 0.85 GHz at 10 dBm
V
DCout
= 1.07 V at 1.85 GHz at 10 dBm
Vsupply = 5 V max
Lead free package
Flip-Chip
(8 Bumps)
Table 1: Order Code
Part Number
STPAC01F2
DESCRIPTION
The STPAC01F2 is an integrated RF detector for
the power control stage. It converts RF signal
coming from the coupler into a DC signal usable
by the digital stage. It is based on the use of two
similar diodes, one providing the signal detection
while the second one is used to provide a temper-
ature information to thermal compensation stage.
A biasing stage suppresses the detection diode
drop voltage effect.
Target applications are cellular phones and PDA
using GSM, DCS, PCS, AMPS, TDMA, CDMA and
800 MHz to 1900 MHz frequency ranges.
BENEFITS
■
Marking
RA
Figure 1: Pin Configuration (Ball side)
3
DC
out
Gnd1
2
V
Temp
Gnd1
Gnd1
1
A
Gnd2
Bias
B
C
The use of IPAD technology allows the RF
front-end designer to save PCB area and to
drastically suppress parasitic inductances.
RFin
Figure 2: Functional diagram
Coupler
V
BIAS
RF input
RF detector
Low pass
filter
Thermal
compensation
STPAC01F2
GND1
GND2
V
DCOut
V
temp
October 2004
REV. 1
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STPAC01F2
Table 2: Absolute Retings
(T
amb
= 25°C)
Symbol
V
BIAS
P
RF
F
OP
V
PP
T
OP
T
STG
Bias voltage
RF power at the RF input
Operating frequency range
ESD level as per MIL-STD 883E method 3015.7 notice 8 (HBM)
Operating temperature range
Storage temperature range
Parameter and test conditions
Value
5
20
0.8 to 2
250
- 30 to + 85
- 55 to + 150
Unit
V
dBm
GHz
V
°C
°C
ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C)
Table 3: Parameters related to BIAS voltage
Symbol
V
BIAS
I
BIAS
Parameter
Operating bias voltage
Bias current
V
BIAS
= 3.2 V
Test conditions
Min.
2.2
Typ.
Max.
3.2
0.5
Unit
V
mA
Table 4: Parameters related detection function
(V
BIAS
+ 2.7 V, DC output load = 100kΩ)
Symbol
V
DCout
Parameter
DC output voltage
(see fig. 1, I
DC
= 50
µA)
Test conditions
F = 1.85 GHz, P
RF
= 10 dBm
F = 1.85 GHz, P
RF
= - 20 dBm
F = 0.85 GHz, P
RF
= 10 dBm
F = 0.85 GHz, P
RF
= - 20 dBm
∆V
DCout
DC output voltage varia-
tion (see fig. 8,
I
DC
= 50µA)
0 < T
amb
< 70°C
F = 1.85 GHz, P
RF
= 10 dBm
2.2 < V
BIAS
< 3.2 V
F = 1.85 GHz, P
RF
= 10 dBm
Min.
0.97
1.83
0.78
1.83
Typ.
1.07
1.93
0.88
1.93
0.09
0.44
Max.
1.17
2.03
0.98
2.03
V
Unit
V
Table 5: Parameters related to detection function
Symbol
V
Temp
∆V
Temp
Parameter
Temperature output
voltage (see fig. 9)
Temperature output
voltage variation
(see fig. 9)
Test conditions
I
DC
= 50µA
I
DC
= 50µA, 0 < T
amb
< 70°C
I
DC
= 50µA, 2.2 < V
BIAS
< 3.2V
Min.
1.83
Typ.
1.93
0.09
0.44
Max.
2.03
Unit
V
V
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STPAC01F2
Figure 3: Application diagram
Coupler
V
BIAS
RF input
RF detector
Low pass
filter
Thermal
compensation
STPAC01F2
I
DC
= 50µA
GND1
GND2
I
DC
= 50µA
V
DCOut
V
temp
-
+
Out
The STPAC01 is the first part of the power amplifier stage and provides both RF power and die tempera-
ture measurements. The above figure gives the basic circuit of RF detector.
A coupler located on the line between RF amplifier output and the antenna takes a part of the available
power and applies it to STPAC01 RF input.
The RF detector and the low pass filter provide a DC voltage depending on the input power. Thermal com-
pensation provides a DC voltage depending on the ambient temperature. As the detection system and the
thermal compensation are based on the same topology, VDCout will have the same temperature variation
as Vtemp. Connected to a differential amplifier, the output will be a voltage directly linked to the RF input
power. VDCout and Vtemp must be bias with 50µA DC current.
This topology offers the most accurate output value as it is 100% compensated.
Figure 4: V
DCout
measurement circuit
Figure 5: V
DCout
versus RF input power
VDCout
RF generator
RF in
STPAC
test board
V
DCOut
2
Multimeter
1.8
1.6
1.4
1.2
Tamb = 25°C
Ibias = 50µA
Vbias = 2.7V
Power
supply
V
BIAS
DC output
voltage
1850MHz
850MHz
Current
generator
I
DC
1
0.8
-20
-15
-10
-5
Pin (dBm)
0
5
10
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STPAC01F2
Figure 6: Relative variation of V
DCout
versus
frequency (from 800 to 900 MHz)
V
DCout
(Freq.) / V
DCOut
(850MHz)
1.05
Figure 7: Relative variation of V
DCout
versus
frequency (from 1800 to 1900 MHz)
V
DCout
(Freq.) / V
DCOut
(850MHz)
1.05
1
1
0.95
0.95
0.9
800
825
850
Frequency in MHz
875
900
0.9
1800
1825
1850
Frequency in MHz
1875
1900
Figure 8: Temperature effect measurement
circuit on V
DCout
Climatic
chamber
RF generator
RF in
STPAC
test board
V
DCOut
Multimeter
Figure 9: V
temp
measurement circuit
Climatic
chamber
STPAC
test board
V
temp
Multimeter
Power
supply
V
BIAS
DC output
voltage
Power
supply
V
BIAS
Temp.
voltage
Current
generator
I
DC
Current
generator
I
DC
Figure 10: V
temp
output
ambient temperature
voltage
versus
Vtemp
1.98
Ibias = 50µA
1.96
1.94
1.92
1.9
1.88
0
10
20
30
40
50
60
70
Tamb (°C)
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STPAC01F2
Figure 11: FLIP-CHIP Package Mechanical Data
500µm ± 50
650µm ± 65
315µm ± 50
500µm ± 50
1.57mm ± 50µm
Figure 12: Foot print recommendations
Copper pad Diameter :
250µm recommended , 300µm max
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 300µm copper pad diameter
Figure 13: Marking
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
ww = week)
365
1.57mm ± 50µm
240
365
E
x x z
y ww
40
220
All dimensions in µm
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