CD4049UB, CD4050B
Semiconductor
August 1998
File Number 926.2
CMOS Hex Buffer/Converters
The Harris CD4049UB and CD4050B are inverting and
non-inverting hex buffers, respectively, and feature logic-
level conversion using only one supply voltage (V
CC
). The
input-signal high level (V
IH
) can exceed the V
CC
supply
voltage when these devices are used for logic-level
conversions. These devices are intended for use as CMOS
to DTL/TTL converters and can drive directly two DTL/TTL
loads. (V
CC
= 5V, V
OL
≤
0.4V, and I
OL
≥
3.3mA.)
The CD4049UB and CD4050B are designated as
replacements for CD4009UB and CD4010B, respectively.
Because the CD4049UB and CD4050B require only one
power supply, they are preferred over the CD4009UB and
CD4010B and should be used in place of the CD4009UB
and CD4010B in all inverter, current driver, or logic-level
conversion applications. In these applications the
CD4049UB and CD4050B are pin compatible with the
CD4009UB and CD4010B respectively, and can be
substituted for these devices in existing as well as in new
designs. Terminal No. 16 is not connected internally on the
CD4049UB or CD4050B, therefore, connection to this
terminal is of no consequence to circuit operation. For
applications not requiring high sink-current or voltage
conversion, the CD4069UB Hex Inverter is recommended.
Features
• CD4049UB Inverting
• CD4050B Non-Inverting
• High Sink Current for Driving 2 TTL Loads
• High-To-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package
Temperature Range; 100nA at 18V and 25
o
C
• 5V, 10V and 15V Parametric Ratings
[ /Title
(CD40
49UB,
CD405
0B)
/Sub-
ject
(CMO
S Hex
Buffer/
Con-
verters)
/Autho
r ()
/Key-
words
(Harris
Semi-
con-
ductor,
CD400
0,
metal
gate,
CMOS
Applications
• CMOS to DTL/TTL Hex Converter
• CMOS Current “Sink” or “Source” Driver
• CMOS High-To-Low Logic Level Converter
Ordering Information
PART NUMBER
CD4049UBE
CD4050BE
CD4049UBF
CD4050BF
CD4050BM
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld PDIP
16 Ld PDIP
16 Ld CERDIP
16 Ld CERDIP
16 Ld SOIC
PKG.
NO.
E16.3
E16.3
F16.3
F16.3
M16.3
NOTE: Wafer and die for this part number is available which meets
all electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
Pinouts
CD4049UB (PDIP, CERDIP)
TOP VIEW
V
CC
1
G=A 2
A 3
H=B 4
B 5
I=C 6
C 7
V
SS
8
16 NC
15 L = F
14 F
13 NC
12 K = E
11 E
10 J = D
9 D
CD4050B (PDIP, CERDIP, SOIC)
TOP VIEW
V
CC
1
G=A 2
A 3
H=B 4
B 5
I=C 6
C 7
V
SS
8
16 NC
15 L = F
14 F
13 NC
12 K = E
11 E
10 J = D
9 D
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1998
CD4049UB, CD4050B
Functional Block Diagrams
CD4049UB
CD4050B
A
3
2
G=A
A
3
2
G=A
B
5
4
H=B
B
5
4
H=B
C
7
6
I=C
C
7
6
I=C
D
9
10
J=D
D
9
10
J=D
E
11
12
K=E
E
11
12
K=E
F
V
CC
V
SS
14
1
8
15
L=F
F
V
CC
V
SS
14
1
8
15
L=F
NC = 13
NC = 16
NC = 13
NC = 16
Schematic Diagrams
V
CC
V
CC
P
R
IN
N
OUT
IN
R
P
P
OUT
N
N
V
SS
V
SS
FIGURE 1A. SCHEMATIC DIAGRAM OF CD4049UB, 1 OF 6
IDENTICAL UNITS
FIGURE 1B. SCHEMATIC DIAGRAM OF CD4050B, 1 OF 6
IDENTICAL UNITS
2
CD4049UB, CD4050B
Absolute Maximum Ratings
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . -0.5V to 20V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . .
±10mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
90
N/A
CERDIP Package. . . . . . . . . . . . . . . . .
130
55
SOIC Package . . . . . . . . . . . . . . . . . . .
100
N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .265
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
LIMITS AT INDICATED TEMPERATURE (
o
C)
TEST CONDITIONS
PARAMETER
Quiescent Device Current
I
DD
(Max)
V
O
(V)
-
-
-
-
Output Low (Sink) Current
I
OL
(Min)
0.4
0.4
0.5
1.5
Output High (Source) Current
I
OH
(Min)
4.6
2.5
9.5
13.5
Out Voltage Low Level
V
OL
(Max)
-
-
-
Output Voltage High Level
V
OH
(Min)
-
-
-
Input Low Voltage, V
IL
(Max)
CD4049UB
4.5
9
13.5
Input Low Voltage, V
IL
(Max)
CD4050B
0.5
1
1.5
Input High Voltage, V
IH
Min
CD4049UB
0.5
1
1.5
V
IN
(V)
0,5
0,10
0,15
0,20
0,5
0,5
0,10
0,15
0,5
0,5
0,10
0,15
0,5
0,10
0,15
0,5
0,10
0,15
-
-
-
-
-
-
-
-
-
V
CC
(V)
5
10
15
20
4.5
5
10
15
5
5
10
15
5
10
5
5
10
15
5
10
15
5
10
15
5
10
15
-55
1
2
4
20
3.3
4
10
26
-0.81
-2.6
-2.0
-5.2
0.05
0.05
0.05
4.95
9.95
14.95
1
2
2.5
1.5
3
4
4
8
12.5
-40
1
2
4
20
3.1
3.8
9.6
25
-0.73
-2.4
-1.8
-4.8
0.05
0.05
0.05
4.95
9.95
14.95
1
2
2.5
1.5
3
4
4
8
12.5
85
30
60
120
600
2.1
2.9
6.6
20
-0.58
-1.9
-1.35
-3.5
0.05
0.05
0.05
4.95
9.95
14.95
1
2
2.5
1.5
3
4
4
8
12.5
125
30
60
120
600
1.8
2.4
5.6
18
-0.48
-1.55
-1.18
-3.1
0.05
0.05
0.05
4.95
9.95
14.95
1
2
2.5
1.5
3
4
4
8
12.5
MIN
-
-
-
-
2.6
3.2
8
24
-0.65
-2.1
-1.65
-4.3
-
-
-
4.95
9.95
14.95
-
-
-
-
-
-
4
8
12.5
25
TYP
0.02
0.02
0.02
0.04
5.2
6.4
16
48
-1.2
-3.9
-3.0
-8.0
0
0
0
5
10
15
-
-
-
-
-
-
-
-
-
MAX
1
2
4
20
-
-
-
-
-
-
-
-
0.05
0.05
0.05
-
-
-
1
2
2.5
1.5
3
4
-
-
-
UNITS
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
3
CD4049UB, CD4050B
DC Electrical Specifications
(Continued)
LIMITS AT INDICATED TEMPERATURE (
o
C)
TEST CONDITIONS
PARAMETER
Input High Voltage, V
IH
Min
CD4050B
V
O
(V)
4.5
9
13.5
Input Current, I
IN
Max
-
V
IN
(V)
-
-
-
0,18
V
CC
(V)
5
10
15
18
-55
3.5
7
11
±0.1
-40
3.5
7
11
±0.1
85
3.5
7
11
±1
125
3.5
7
11
±1
MIN
3.5
7
11
-
25
TYP
-
-
-
±10
-5
MAX
-
-
-
±0.1
UNITS
V
V
V
µA
AC Electrical Specifications
PARAMETER
Propagation Delay Time
Low to High, t
PLH
CD4049UB
T
A
= 25
o
C, Input t
r
, t
f
= 20ns, C
L
= 50pF, R
L
= 200kΩ
TEST CONDITIONS
V
IN
5
10
10
15
15
V
CC
5
10
5
15
5
5
10
5
15
5
5
10
5
15
5
5
10
5
15
5
5
10
15
5
10
15
-
-
LIMITS (ALL PACKAGES)
TYP
60
32
45
25
45
70
40
45
30
40
32
20
15
15
10
55
22
50
15
50
80
40
30
30
20
15
15
5
MAX
120
65
90
50
90
140
80
90
60
80
65
40
30
30
20
110
55
100
30
100
160
80
60
60
40
30
22.5
7.5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
Propagation Delay Time
Low to High, t
PLH
CD4050B
5
10
10
15
15
Propagation Delay Time
High to Low, t
PHL
CD4049UB
5
10
10
15
15
Propagation Delay Time
High to Low, t
PHL
CD4050B
5
10
10
15
15
Transition Time, Low to High, t
TLH
5
10
15
Transition Time, High to Low, t
THL
5
10
15
Input Capacitance, C
IN
CD4049UB
Input Capacitance, C
IN
CD4050B
-
-
4
CD4049UB, CD4050B
Typical Performance Curves
T
A
= 25
o
C
SUPPLY VOLTAGE (V
CC
) = 5V
V
O
, OUTPUT VOLTAGE (V)
5
4
MINIMUM
3
2
1
MAXIMUM
V
O
, OUTPUT VOLTAGE (V)
5
4
3
2
1
MINIMUM
MAXIMUM
T
A
= 25
o
C
SUPPLY VOLTAGE (V
CC
) = 5V
0
1
2
3
4
0
1
2
3
4
V
I
, INPUT VOLTAGE (V)
V
I
, INPUT VOLTAGE (V)
FIGURE 2. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS FOR CD4049UB
FIGURE 3. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS FOR CD4050B
I
OL
, OUTPUT LOW (SINK) CURRENT (mA)
I
OL
, OUTPUT LOW (SINK) CURRENT (mA)
T
A
= 25
o
C
70
60
50
40
30
GATE TO SOURCE VOLTAGE (V
GS
) = 5V
20
10
15V
10V
T
A
= 25
o
C
70
60
50
40
30
20
GATE TO SOURCE VOLTAGE (V
GS
) = 5V
10
15V
10V
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-8
T
A
= 25
o
C
OUTPUT HIGH (SOURCE)
CURRENT CHARACTERISTICS
-5
GATE TO SOURCE VOLTAGE
V
GS
= -5V
-10
-15
-20
-25
-10V
-30
-15V
-35
-7
-6
-5
-4
-3
-2
-1
0
FIGURE 5. MINIMUM OUTPUT LOW (SINK) CURRENT DRAIN
CHARACTERISTICS
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-8
-7
-6
-5
-4
-3
-2
T
A
= 25
o
C
-5
V
GS
= -5V
-10V
-15V
-25
-30
-35
-10
-15
-20
OUTPUT HIGH (SOURCE)
GATE TO SOURCE VOLTAGE
CURRENT CHARACTERISTICS
-1
0
FIGURE 6. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
5
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