CE66 Series Embedded Array
Mixed-Signal Macros
D/A Converters
• 8-bit: 220 MHz (video)
• 8-bit: 50 MHz (video)
• 8-bit: 1.5 MHz (general purpose)
• 10-bit: 30 MHz (general purpose)
• 10-bit: 1.5 MHz (general purpose)
A/D Converters
• 6-bit: 300 MHz (disk)
• 8-bit: 50 MHz (video)
• 10-bit: 20 MHz (general purpose)
• 10-bit: 1 MHz (general purpose)
Multiplier Compiler
• Multiplicand (m): 4 < m < 32
• Multiplier (n): 4 < n < 32 (even numbers only)
Memory Macros
• SRAM Compiler: single and dual port (1 R/W, 1R),
up to 72K bits per block, partial write option
• ROM Compiler: up to 512K bits per block
• Delay line: up to 32K bits
Phase-Locked Loops
• Analog: 50-200 MHz
• Digital: 180-360 MHz (Preliminary)
I/Os
• 3.3V, 5V, and 5V tolerant
• Slew-rate controlled
• CMOS, TTL, LVTTL, T-LVTTL, SDRAM I/F,
PCI, I
2
C, USB
SOC IP Cores
ARC 32-bit RISC
832/833/835 SPARClite Hard Macros
Oak DSP Hard Macro
10/100 MAC
64/256 QAM
MPEG2 Decoder/Demultiplexer
8VSB TV Demodulator
AC-3 Dolby Voice Decoder
JPEG Encoder and Decoder
PCI–33/66 MHz, 32/64-bit cores
USB Host Controller/Device
I
2
C
IDE (ATA3) Host Controller
Smart Card I/F
IRDA I/R Interface
More IPs are being added
ASIC Design Kit and EDA Support
Verilog Logic Simulators from
Cadence, Synopsys, and Mentor
VHDL/VITAL Logic
Simulators from Synopsys,
Cadence, and Mentor
Synthesis, DFT, and STA tools
from Synopsys
Other EDA tools
Verilog-XL, NC-Verilog,
VCS, Model-sim (Verilog)
VSS, Model-sim (VHDL), V-System,
Leapfrog
Design Compiler, Test Compiler,
PrimeTime, MOTIVE, and
Sunrise TestGen
Chrysalis Design Verifyer
PACKAGE AVAILABILITY
No. of Pins
TQFP
100
LQFP
100
144
176
208
QFP
120
144
160
176
208
240
256
HQFP
208
240
256
304
PBGA
256
352
FBGA
112
144
168
176
192
224
288
Frame Size
P1, P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S1, S2
P1, P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S1, S2
P1, P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S1, S2
P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF
P6, P7, P8, P9, PA, PB, PC, PD, S5, S6, S7
P1, P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S1, S2
P1, P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S1, S2
P2, P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S2, S3, S4
P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S3, S4
P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S5, S6
P8, P9, PA, PB, PC, PD, PE, PF, S7, S8
P9, PA, PB, PC, PD, PE, PF
P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S5, S6
P8, P9, PA, PB, PC, PD, PE, PF, S7, S8
P9, PA, PB, PC, PD, PE, PF, S8
PC, PD, PE, PF, S9, SA
P9, PA, PB, PC, PD, PE, PF, S7, S8
PF, SA
P2, P3, P4, P5, P6, P7, S1, S2, S3
P3, P4, P5, P6, P7, S1, S2, S3, S4
P6, P7, P8, P9, S3, S4, S5, S6, S7
P3, P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, S3, S4
P4, P5, P6, P7, P8, P9, PA, PB, PC, PD, PE, PF, S4, S5
P7, P8, P9, PA, PB, PC, PD, PE, PF, S6, S7
PC, PD, PE, PF, S8, S9, SA
FUJITSU MICROELECTRONICS AMERICA, INC.
Corporate Headquarters
1250 East Arques Avenue, Sunnyvale, California 94088-3470
Tel: (800) 866-8608 Fax: (408) 737-5999
E-mail: inquiry@fma.fujitsu.com Web Site: http://www.fma.fujitsu.com
© 1999 Fujitsu Microelectronics, Inc.
All company and product names are trademarks or
registered trademarks of their respective owners.
Printed in the U.S.A. ASIC-FS-20640-11/99
FPGA/CPLD
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