74HC258
Quad 2-input multiplexer; 3-state; inverting
Rev. 04 — 14 April 2008
Product data sheet
1. General description
The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC
standard no. 7A.
The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select
4 bits of data from two sources and is controlled by a common data select input (S).
The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data
inputs from source 1 (1I1 to 4I1) are selected when S is HIGH.
Data appears at the outputs (1Y to 4Y) in inverted form from the select inputs.
The 74HC258 is the logic implementation of a 4-pole, 2-position switch, where the position
of the switch is determined by the logic levels applied to S. The outputs are forced to a
high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y
= OE
× (
1I1
×
S
+ 1I0
×
S
)
2Y
= OE
× (
2I1
×
S
+
2I0
×
S
)
3Y
= OE
× (
3I1
×
S
+
3I0
×
S
)
4Y
= OE
× (
4I1
×
S
+
4I0
×
S
)
The 74HC258 is identical to the 74HC257 but has inverting outputs.
2. Features
I
I
I
I
I
3-state outputs interface directly with system bus
Low-power dissipation
Inverting data path
Complies with JEDEC standard no. 7A
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C.
NXP Semiconductors
74HC258
Quad 2-input multiplexer; 3-state; inverting
3. Ordering information
Table 1.
Ordering information
Temperature range
74HC258N
74HC258D
74HC258DB
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
Name
DIP16
SO16
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1
SOT338-1
Type number Package
SSOP16 plastic shrink small outline package; 16 leads; body
width 5.3 mm
4. Functional diagram
1
3
5
6
11 10 14 13
2
1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1
1 S
SELECTOR
2
3
5
6
11
S
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
OE
001aab966
1Y
4
2Y
7
15 OE
10
3-STATE MULTIPLEXER OUTPUTS
14
13
3Y
9
4Y
12
1Y
4
2Y
7
3Y
9
4Y
12
001aab968
15
Fig 1.
Functional diagram
Fig 2.
Logic symbol
1I0
1Y
1I1
1
15
G1
EN
MUX
2I0
2Y
2
3
5
1
1
2I1
4
3I0
7
6
11
9
10
14
12
13
001aab967
3Y
3I1
4I0
4Y
4I1
OE
S
001aab969
Fig 3.
74HC258_4
IEC logic symbol
Fig 4.
Logic diagram
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 14 April 2008
2 of 14
NXP Semiconductors
74HC258
Quad 2-input multiplexer; 3-state; inverting
5. Pinning information
5.1 Pinning
S
1I0
1I1
1Y
2I0
2I1
2Y
GND
1
2
3
4
16 V
CC
15 OE
14 4I0
13 4I1
258
5
6
7
8
001aab904
12 4Y
11 3I0
10 3I1
9
3Y
Fig 5.
Pin configuration
5.2 Pin description
Table 2.
Symbol
S
1I0
1I1
1Y
2I0
2I1
2Y
GND
3Y
3I1
3I0
4Y
4I1
4I0
OE
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
common data select input
data input 1 from source 0
data input 1 from source 1
3-state multiplexer output 1; inverted
data input 2 from source 0
data input 2 from source 1
3-state multiplexer output 2; inverted
ground (0 V)
3-state multiplexer output 3; inverted
data input 3 from source 1
data input 3 from source 0
3-state multiplexer output 4; inverted
data input 4 from source 1
data input 4 from source 0
output enable input (active LOW)
positive supply voltage
74HC258_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 14 April 2008
3 of 14
NXP Semiconductors
74HC258
Quad 2-input multiplexer; 3-state; inverting
6. Functional description
Table 3.
Control
OE
H
L
L
L
L
[1]
Function table
[1]
Input
S
X
L
L
H
H
nl0
X
L
H
X
X
nI1
X
X
X
L
H
Output
nY
Z
H
L
H
L
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
=
−40 °C
to +125
°C
DIP16 package
SO16 package
SSOP16 package
[1]
[2]
[3]
[4]
[2]
[3]
[4]
Conditions
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to V
CC
+ 0.5 V
[1]
[1]
Min
−0.5
-
-
-
-
−70
−65
-
-
-
Max
+7.0
±20
±20
±35
70
-
+150
750
500
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
tot
derates linearly with 12 mW/K above 70
°C.
P
tot
derates linearly with 8 mW/K above 70
°C.
P
tot
derates linearly with 5.5 mW/K above 60
°C.
74HC258_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 14 April 2008
4 of 14
NXP Semiconductors
74HC258
Quad 2-input multiplexer; 3-state; inverting
8. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
∆t/∆V
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
Min
2.0
0
0
−40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
Unit
V
V
V
°C
ns
ns
ns
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
Min
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
−20 µA;
V
CC
= 2.0 V
I
O
=
−20 µA;
V
CC
= 4.5 V
I
O
=
−20 µA;
V
CC
= 6.0 V
I
O
=
−6
mA; V
CC
= 4.5 V
I
O
=
−7.8
mA; V
CC
= 6.0 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 20
µA;
V
CC
= 2.0 V
I
O
= 20
µA;
V
CC
= 4.5 V
I
O
= 20
µA;
V
CC
= 6.0 V
I
O
= 6 mA; V
CC
= 4.5 V
I
O
= 7.8 mA; V
CC
= 6.0 V
I
I
I
OZ
I
CC
C
I
input leakage
current
OFF-state
output current
V
I
= V
CC
or GND;
V
CC
= 6.0 V
V
I
= V
IH
or V
IL
; V
CC
= 6.0 V;
V
O
= V
CC
or GND; I
O
= 0 A
-
-
-
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
±1.0
±5.0
80
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1.0
±10
160
-
V
V
V
V
V
µA
µA
µA
pF
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
25
°C
Typ Max
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
−40 °C
to +85
°C
Min
1.5
3.15
4.2
-
-
-
Max
-
-
-
0.5
1.35
1.8
−40 °C
to +125
°C
Unit
Min
1.5
3.15
4.2
-
-
-
Max
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
3.98 4.32
5.48 5.81
0.15 0.26
0.16 0.26
-
-
-
3.5
±0.1
±0.5
8
-
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
input
capacitance
74HC258_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 14 April 2008
5 of 14
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
