(Note 3) ................................... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage..................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage .................. –0.3V to (V
DD
+ 0.3V)
Power Dissipation ...............................................100mW
Operation Temperature Range
LTC1403C/LTC1403AC ............................. 0°C to 70°C
LTC1403I/LTC1403AI ...........................–40°C to 85°C
LTC1403H/LTC1403AH ...................... –40°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
MSE PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
q
JA
= 40°C/W
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
orDer inFormation
LEAD FREE FINISH
LTC1403CMSE#PBF
LTC1403IMSE#PBF
LTC1403HMSE#PBF
LTC1403ACMSE#PBF
LTC1403AIMSE#PBF
LTC1403AHMSE#PBF
TAPE AND REEL
LTC1403CMSE#TRPBF
LTC1403IMSE#TRPBF
LTC1403HMSE#TRPBF
http://www.linear.com/product/LTC1403#orderinfo
PART MARKING*
LTBDN
LTBDP
LTBDP
LTADF
LTAFD
LTAFD
PACKAGE DESCRIPTION
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
LTC1403ACMSE#TRPBF
LTC1403AIMSE#TRPBF
LTC1403AHMSE#TRPBF
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/.
Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
2
1403fc
For more information
www.linear.com/LTC1403
LTC1403/LTC1403A
converter characteristics
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Offset Error
Gain Error
Gain Tempco
(Notes 4, 5, 18)
(Notes 4, 18)
(Note 4, 18)
Internal Reference (Note 4)
External Reference
CONDITIONS
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With internal reference. V
DD
= 3V
LTC1403
MIN
12
–2
±0.25
±1
±5
±15
±1
2
10
30
12
–2
–20
–40
±0.25
±2
±5
±15
±1
2
20
40
LTC1403H
14
–4
–20
–60
±0.5
±2
±10
±15
±1
4
20
60
LTC1403A
LTC1403AH
TYP MAX
±0.5
±2
±10
±15
±1
4
30
80
UNITS
Bits
LSB
LSB
LSB
ppm/°C
ppm/°C
14
–4
–30
–80
TYP MAX MIN
TYP MAX MIN
TYP MAX MIN
l
–10
l
–30
analog input
SYMBOL
V
IN
V
CM
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
CMRR
PARAMETER
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. V
DD
= 3V
CONDITIONS
2.7V ≤ V
DD
≤ 3.3V
l
MIN
TYP
0 to 2.5
0 to V
DD
MAX
UNITS
V
V
Analog Differential Input Range (Notes 3, 9)
Analog Common Mode + Differential Input Range (Note 10)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Analog Input Common Mode Rejection Ratio
l
1
13
39
1
0.3
µA
pF
ns
ns
ps
dB
dB
(Note 6)
l
f
IN
= 1MHz, V
IN
= 0V to 3V
f
IN
= 100MHz, V
IN
= 0V to 3V
–60
–15
Dynamic accuracy
SYMBOL
SINAD
PARAMETER
Signal-to-Noise Plus
Distortion Ratio
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. V
DD
= 3V
LTC1403/LTC1403H
CONDITIONS
100kHz Input Signal
1.4MHz Input Signal
1.4MHz Input Signal (H Grade)
100kHz Input Signal, External V
REF
= 3.3V,
V
DD
≥ 3.3V
750kHz Input Signal, External V
REF
= 3.3V,
V
DD
≥ 3.3V
100kHz First 5 Harmonics
1.4MHz First 5 Harmonics
100kHz Input Signal
1.4MHz Input Signal
1.25V to 2.5V 1.25MHz into A
IN+
, 0V to 1.25V,
1.2MHz into A
IN–
V
REF
= 2.5V (Note 18)
V
IN
= 2.5V
P-P
, SDO = 11585LSB
P-P
(Note 15)
S/(N + D) ≥ 68dB
l
l
LTC1403A/LTC1403AH
MIN
70
69
TYP
73.5
73.5
73.0
76.3
76.3
–90
–86
–90
–86
–82
1
50
5
MAX
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
LSB
RMS
MHz
MHz
MIN
68
67
TYP
70.5
70.5
70.5
72
72
–87
–83
–87
–83
–82
0.25
50
5
MAX
THD
SFDR
IMD
Total Harmonic
Distortion
Spurious Free
Dynamic Range
Intermodulation
Distortion
Code-to-Code
Transition Noise
Full Power Bandwidth
Full Linear Bandwidth
l
–76
–78
1403fc
For more information
www.linear.com/LTC1403
3
LTC1403/LTC1403A
internal reFerence characteristics
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
V
REF
Settling Time
V
DD
= 2.7V to 3.6V, V
REF
= 2.5V
Load Current = 0.5mA
CONDITIONS
I
OUT
= 0
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V
MIN
TYP
2.5
15
600
0.2
2
MAX
UNITS
V
ppm//°C
µV/V
Ω
ms
Digital inputs anD Digital outputs
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
V
OUT
= 0V, V
DD
= 3V
V
OUT
= V
DD
= 3V
V
DD
= 3V, I
OUT
= –200µA
V
DD
= 2.7V, I
OUT
= 160µA
V
DD
= 2.7V, I
OUT
= 1.6mA
V
OUT
= 0V to V
DD
CONDITIONS
V
DD
= 3.3V
V
DD
= 2.7V
V
IN
= 0V to V
DD
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V
MIN
l
l
l
TYP
MAX
0.6
±10
UNITS
V
V
µA
pF
V
V
V
µA
pF
mA
mA
2.4
5
l
l
l
2.5
2.9
0.05
0.10
1
20
15
0.4
±10
power requirements
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 17)
SYMBOL
V
DD
I
DD
PARAMETER
Supply Voltage
Positive Supply Voltage
CONDITIONS
Active Mode
Active Mode (LTC1403H, LTC1403AH)
Nap Mode
Nap Mode (LTC1403H, LTC1403AH)
Sleep Mode (LTC1403, LTC1403H)
Sleep Mode (LTC1403A, LTC1403AH)
Active Mode with SCK in Fixed State (Hi or Lo)
l
l
l
l
MIN
2.7
TYP
4.7
5.2
1.1
1.2
2
2
12
MAX
3.6
7
8
1.5
1.8
15
10
UNITS
V
mA
mA
mA
mA
µA
µA
mW
P
D
Power Dissipation
4
1403fc
For more information
www.linear.com/LTC1403
LTC1403/LTC1403A
timing characteristics
t
THROUGHPUT
t
SCK
t
CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
12
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V
CONDITIONS
l
l
SYMBOL
PARAMETER
f
SAMPLE(MAX)
Maximum Sampling Frequency per Channel (Conversion Rate)
Minimum Sampling Period (Conversion + Acquisition Period)
Clock Period
Conversion Time
Minimum Positive or Negative SCLK Pulse Width
CONV to SCK Setup Time
Nearest SCK Edge Before CONV
Minimum Positive or Negative CONV Pulse Width
SCK to Sample Mode
CONV to Hold Mode
16th SCK↑ to CONV↑ Interval (Affects Acquisition Period)
Minimum Delay from SCK to Valid Bits 0 Through 13
SCK to Hi-Z at SDO
Previous SDO Bit Remains Valid After SCK
V
REF
Settling Time After Sleep-to-Wake Transition
MIN
2.8
19.8
17
2
3
0
4
4
1.2
45
TYP
MAX
357
10000
UNITS
MHz
ns
ns
SCLK cycles
ns
ns
ns
ns
ns
ns
ns
(Notes 16)
(Note 6)
(Note 6)
(Notes 6, 10)
(Note 6)
(Note 6)
(Note 6)
(Notes 6, 11)
(Notes 6, 7, 13)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 14)
l
18
8
6
2
2
ns
ns
ns
ms
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to GND.
Note 3:
When these pins are taken below GND or above V
DD
, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below GND or greater than V
DD
without latchup.
Note 4:
Offset and full-scale specifications are measured for a single-
ended A
IN+
input with A
IN–
grounded and using the internal 2.5V reference.
Note 5:
Integral linearity is tested with an external 2.55V reference and is
defined as the deviation of a code from the straight line passing through
the actual endpoints of a transfer curve. The deviation is measured from
the center of quantization band.
Note 6:
Guaranteed by design, not subject to test.
Note 7:
Recommended operating conditions.
Note 8:
The analog input range is defined for the voltage difference
between A
IN+
and A
IN–
.
Note 9:
The absolute voltage at A
IN+
and A
IN–
must be within this range.
Note 10:
If less than 3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 11:
Not the same as aperture delay. Aperture delay is smaller (1ns)
because the 2.2ns delay through the sample-and-hold is subtracted from
the CONV to Hold mode delay.
Note 12:
The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 13:
The time period for acquiring the input signal is started by the
16th rising clock and it is ended by the rising edge of convert.
Note 14:
The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10µF capacitive load.
Note 15:
The full power bandwidth is the frequency where the output code
swing drops to 3dB with a 2.5V
P-P
input sine wave.
Note 16:
Maximum clock period guarantees analog performance during
conversion. Output data can be read without an arbitrarily long clock.
Note 17:
V
DD
= 3V, f
SAMPLE
= 2.8Msps.
Note 18:
The LTC1403A is measured and specified with 14-bit Resolution
(1LSB = 152µV) and the LTC1403 is measured and specified with 12-bit
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