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LTC6957IDD-4#TRPBF

产品描述Clock Buffer Low Phase Noise, Dual Output Buffer/Driver/Logic Converter with Complementary CMOS Outputs
产品类别模拟混合信号IC    驱动程序和接口   
文件大小1MB,共38页
制造商ADI(亚德诺半导体)
官网地址https://www.analog.com
标准
下载文档 详细参数 全文预览

LTC6957IDD-4#TRPBF概述

Clock Buffer Low Phase Noise, Dual Output Buffer/Driver/Logic Converter with Complementary CMOS Outputs

LTC6957IDD-4#TRPBF规格参数

参数名称属性值
Brand NameAnalog Devices Inc
是否无铅含铅
是否Rohs认证符合
厂商名称ADI(亚德诺半导体)
包装说明HVSON,
针数12
制造商包装代码05-08-1725
Reach Compliance Codecompliant
接口集成电路类型INTERFACE CIRCUIT
JESD-30 代码S-PDSO-N12
JESD-609代码e3
长度3 mm
湿度敏感等级1
功能数量1
端子数量12
最高工作温度85 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码HVSON
封装形状SQUARE
封装形式SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)260
座面最大高度0.8 mm
最大供电电压3.45 V
最小供电电压3.15 V
标称供电电压3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层MATTE TIN
端子形式NO LEAD
端子节距0.45 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度3 mm

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FEATURES
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LTC6957-1/LTC6957-2/
LTC6957-3/LTC6957-4
Low Phase Noise, Dual
Output Buffer/Driver/
Logic Converter
DESCRIPTION
The
LTC
®
6957-1/LTC6957-2/LTC6957-3/LTC6957-4
is a
family of very low phase noise, dual output AC signal
buffer/driver/logic level translators. The input signal can
be a sine wave or any logic level (≤2V
P-P
). There are four
members of the family that differ in their output logic
signal type as follows:
LTC6957-1: LVPECL Logic Outputs
LTC6957-2: LVDS Logic Outputs
LTC6957-3: CMOS Logic, In-Phase Outputs
LTC6957-4: CMOS Logic, Complementary Outputs
The LTC6957 will buffer and distribute any logic signal
with minimal additive noise, however, the part really
excels at translating sine wave signals to logic levels. The
early amplifier stages have selectable lowpass filtering
to minimize the noise while still amplifying the signal to
increase its slew rate. This input stage filtering/noise limit-
ing is especially helpful in delivering the lowest possible
phase noise signal with slow slewing input signals such
as a typical 10MHz sine wave system reference.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents 7969189 and 8319551.
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Low Phase Noise Buffer/Driver
Optimized Conversion of Sine Wave Signals to
Logic Levels
Three Logic Output Types Available
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LVPECL
n
LVDS
n
CMOS
Additive Jitter 45fs
RMS
(LTC6957-1)
Frequency Range Up to 300MHz
3.15V to 3.45V Supply Operation
Low Skew 3ps Typical
Fully Specified from –40°C to 125°C
12-Lead MSOP and 3mm × 3mm DFN Packages
System Reference Frequency Distribution
High Speed ADC, DAC, DDS Clock Driver
Military and Secure Radio
Low Noise Timing Trigger
Broadband Wireless Transceiver
High Speed Data Acquisition
Medical Imaging
Test and Measurement
APPLICATIONS
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TYPICAL APPLICATION
3.3V
0.1µF
–140
V
+
Additive Phase Noise at 100MHz
SINGLE-ENDED SINE WAVE INPUT
AT +7dBm (500mV
RMS
)
FILTA = FILTB = GND
LTC6957-2 (LVDS)
LTC6957-4 (CMOS)
–155
LTC6957-3
(CMOS)
LTC6957-1 (LVPECL)
1k
10k
100k
OFFSET FREQUENCY (Hz)
1M
FILTA
100MHz
+7dBm
SINE WAVE
50Ω
10nF
FILTB
10nF
IN
+
IN
SD1
OUT1
TO PLL CHIPS
OR SYSTEM
SAMPLING CLOCKS
PHASE NOISE (dBc/Hz)
–145
–150
OCXO
OUT2
–160
GND
SD2
6957 TA01a
–165
100
69571234 TA01b
6957fb
For more information
www.linear.com/LTC6957-1
1

 
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