LTC694-3.3/LTC695-3.3
3.3V Microprocessor
Supervisory Circuits
FEATURES
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DESCRIPTION
The LTC
®
694-3.3/LTC695-3.3 provide complete 3.3V power
supply monitoring and battery control functions. These
include power-on reset, battery back-up, RAM write pro-
tection, power failure warning and watchdog timing. The
devices are pin compatible upgrades of the LTC694/LTC695
that are optimized for 3.3V systems. Operating power
consumption has been reduced to 0.6mW (typical) and
3μW maximum in battery back-up mode. Microprocessor
reset and memory write protection are provided when the
supply falls below 2.9V. The
RESET
output is guaranteed
to remain logic low with V
CC
as low as 1V.
The LTC694-3.3/LTC695-3.3 power the active RAMs with
a charge pumped NMOS power switch to achieve low
dropout and low supply current. When primary power is
lost, auxiliary power, connected to the battery input pin,
powers the RAMs in standby through an efficient PMOS
switch.
For an early warning of impending power failure, the
LTC694-3.3/LTC695-3.3 provide an internal comparator
with a user-defined threshold. An internal watchdog timer
is also available, which forces the reset pins to active states
when the watchdog input is not toggled prior to a preset
timeout period.
Guaranteed Reset Assertion at V
CC
= 1V
Pin Compatible with LTC694/LTC695 for 3.3V Systems
200μA Typical Supply Current
Fast (30ns Typ) Onboard Gating of
RAM Chip Enable Signals
SO-8 and S16 Packages
2.90V Precision Voltage Monitor
Power OK/Reset Time Delay: 200ms or Adjustable
Minimum External Component Count
1μA Maximum Standby Current
Voltage Monitor for Power-Fail or
Low-Battery Warning
Thermal Limiting
Performance Specified Over Temperature
APPLICATIONS
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3.3V Low Power Systems
Critical μP Power Monitoring
Intelligent Instruments
Battery-Powered Computers and Controllers
Automotive Systems
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
V
IN
≥ 5V
RESET
Output Voltage
vs Supply Voltage
V
CC
0.1μF
V
OUT
LTC695-3.3
V
BATT
2.4V
CE
IN
CE
OUT
RESET
PFO
WDI
GND
POWER TO
μP
CMOS RAM POWER
0.1μF
μP
SYSTEM
DECODER OUTPUT
RAM
CS
μP
RESET
μP NMI
I/O LINE
100Ω
0.1μF
694/5-3.3 TA01
+
1μF
LT1129-3.3
V
IN
V
OUT
OUT SENSE
SHDN
GND
3.3V
5
+
100μF
RESET
OUTPUT VOLTAGE (V)
4
3
51k
PFI
18k
MICROPROCESSOR RESET, BATTERY BACK-UP,
RAM WRITE PROTECTION, POWER WARNING AND
WATCHDOG TIMING ARE ALL IN A SINGLE CHIP
FOR 3.3V MICROPROCESSOR SYSTEM
2
1
0
0
1
3
4
2
SUPPLY VOLTAGE (V)
5
694/5-3.3 TA02
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LTC694-3.3/LTC695-3.3
ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)
Terminal Voltage
V
CC
.......................................................... –0.3V to 6V
V
BATT
...................................................... –0.3V to 6V
All Other Inputs ..................... –0.3V to (V
OUT
+ 0.3V)
Input Current
V
CC
..................................................................100mA
V
BATT
.................................................................25mA
GND ...................................................................10mA
V
OUT
Output Current ................. Short-Circuit Protected
Power Dissipation ............................................. 500mW
Operating Temperature Range
LTC694C-3.3/LTC695C-3.3 ...................... 0°C to 70°C
LTC694I-3.3/LTC695I-3.3 ....................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
PIN CONFIGURATION
TOP VIEW
V
BATT
V
OUT
V
CC
GND
BATT ON
LOW LINE
OSC IN
OSC SEL
1
2
3
4
5
6
7
8
N PACKAGE
16-LEAD PDIP
T
JMAX
= 110°C,
θ
JA
= 130°C/W
TOP VIEW
V
OUT
V
CC
GND
1
2
3
8
7
6
5
N8 PACKAGE
8-LEAD PDIP
T
JMAX
= 110°C,
θ
JA
= 130°C/W
V
BATT
RESET
WDI
PFO
V
OUT
V
CC
GND
PFI
1
2
3
4
16 RESET
15
RESET
14 WDO
13
CE
IN
12
CE
OUT
11 WDI
10
PFO
9
PFI
V
BATT
1
V
OUT
V
CC
2
GND 3
BATT ON 4
LOW LINE
5
OSC IN 6
OSC SEL 7
8
TOP VIEW
16 RESET
15
RESET
14
WDO
13
CE
IN
12
CE
OUT
11 WDI
10
PFO
9 PFI
SW PACKAGE
16-LEAD PLASTIC WIDE SO
T
JMAX
= 110°C,
θ
JA
= 130°C/W
TOP VIEW
8
7
6
5
VBATT
RESET
WDI
PFO
PFI 4
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 110°C,
θ
JA
= 180°C/W
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LTC694-3.3/LTC695-3.3
ORDER INFORMATION
LEAD FREE FINISH
LTC695CN-3.3#PBF
LTC695IN-3.3#PBF
LTC695CSW-3.3#PBF
LTC695ISW-3.3#PBF
LTC694CN8-3.3#PBF
LTC694IN8-3.3#PBF
LTC694CS8-3.3#PBF
LTC694IS8-3.3#PBF
TAPE AND REEL
LTC695CN-3.3#TRPBF
LTC695IN-3.3#TRPBF
LTC695CSW-3.3#TRPBF
LTC695ISW-3.3#TRPBF
LTC694CN8-3.3#TRPBF
LTC694IN8-3.3#TRPBF
LTC694CS8-3.3#TRPBF
LTC694IS8-3.3#TRPBF
PART MARKING
LTC695CN-3.3
LTC695IN-3.3
LTC695CSW-3.3
LTC695ISW-3.3
LTC694CN8-3.3
LTC694IN8-3.3
6943
694I3
PACKAGE DESCRIPTION
16-Lead PDIP
16-Lead PDIP
16-Lead Plastic Wide SO
16-Lead Plastic Wide SO
8-Lead PDIP
8-Lead PDIP
8-Lead Plastic SO
8-Lead Plastic SO
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
Consult LTC Marketing for military grade parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
PRODUCT SELECTION GUIDE
PINS
LTC694-3.3
LTC695-3.3
LTC690
LTC691
LTC694
LTC695
LTC699
LTC1232
LTC1235
8
16
8
16
8
16
8
8
16
RESET
THRESHOLD
(V)
2.90
2.90
4.65
4.65
4.65
4.65
4.65
4.37/4.62
4.65
WATCHDOG
TIMER
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
BATTERY
BACK-UP
X
X
X
X
X
X
POWER-FAIL
WARNING
X
X
X
X
X
X
X
X
X
RAM WRITE
PROTECT
PUSH-BUTTON
RESET
CONDITIONAL
BATTERY
BACK-UP
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LTC694-3.3/LTC695-3.3
ELECTRICAL CHARACTERISTICS
PARAMETER
Battery Back-Up Switching
Operating Voltage Range
V
OUT
Output Voltage
V
CC
V
BATT
I
OUT
= 1mA
I
OUT
= 50mA
V
OUT
in Battery Back-Up Mode
Supply Current (Exclude I
OUT
)
Supply Current in Battery Back-Up Mode
I
OUT
= 250μA, V
CC
< V
BATT
I
OUT
≤ 50μA, V
CC
= 3.6V
V
CC
= 0V, V
BATT
= 2V
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denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V, V
BATT
= 2V, unless otherwise noted.
CONDITIONS
MIN
3.0
1.5
V
CC
– 0.1
V
CC
– 0.2
V
CC
– 0.8
V
BATT
– 0.1
V
CC
– 0.01
V
CC
– 0.01
V
CC
– 0.4
V
BATT
– 0.02
0.2
0.2
0.04
0.04
–0.02
–0.10
70
50
20
I
SINK
= 800μA
BATT ON = V
OUT
, Sink Current
BATT ON = 0V, Source Current
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TYP
MAX
5.50
2.75
UNITS
V
V
V
V
V
V
0.6
1.0
1
5
0.02
0.10
mA
mA
μA
μA
μA
μA
mV
mV
mV
Battery Standby Current (+ = Discharge, – = Charge) 3.6V > V
CC
> V
BATT
+ 0.2V
Battery Switchover Threshold (V
CC
– V
BATT
)
Battery Switchover Hysteresis
BATT ON Output Voltage (Note 4)
BATT ON Output Short-Circuit Current (Note 4)
Reset and Watchdog Timer
Reset Voltage Threshold
Reset Threshold Hysteresis
Reset Active Time
Watchdog Timeout Period, Internal Oscillator
OSC SEL HIGH, V
CC
= 3V
Long Period, V
CC
= 3V
Short Period, V
CC
= 3V
Watchdog Timeout Period, External Clock (Note 5)
Reset Active Time PSRR
Watchdog Timeout Period PSRR, Internal OSC
Minimum WDI Input Pulse Width
RESET
Output Voltage at V
CC
= 1V
_
RESET
and
LOW LINE
Output Voltage (Note 4)
RESET and
WDO
Output Voltage (Note 4)
_
RESET,
RESET, WDO, LOW LINE
Output Short-Circuit Current (Note 4)
WDI Input Threshold
WDI Input Current
Short Period
Long Period
V
IL
= 0.4V, V
IH
= 3V
I
SINK
= 10μA, V
CC
= 1V
I
SINK
= 400μA, V
CC
= 2.8V
I
SOURCE
= 0.1μA, V
CC
= 3V
I
SINK
= 400μA, V
CC
= 3V
I
SOURCE
= 0.1μA, V
CC
= 2.8V
Output Source Current
Output Sink Current
Logic Low
Logic High
WDI = V
OUT
WDI = 0V
Long Period, V
CC
= 3V
Short Period, V
CC
= 3V
Power-Up
Power-Down
0.3
0.5
2.8
160
140
1.2
1.0
80
70
4032
960
4
2
32
25
1
2.9
40
200
200
1.6
1.6
100
100
25
3.0
240
280
2.0
2.25
120
140
4097
1025
V
mA
μA
V
mV
ms
ms
sec
sec
ms
ms
Clock
Cycles
ms/V
ms/V
ms/V
ns
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200
4
2.3
0.3
2.3
1
3
9
25
0.4
2.3
–50
4
–8
50
200
0.3
mV
V
V
V
V
μA
mA
V
V
μA
μA
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LTC694-3.3/LTC695-3.3
ELECTRICAL CHARACTERISTICS
PARAMETER
Power-Fail Detector
PFI Input Threshold
PFI Input Threshold PSRR
PFI Input Current
PFO
Output Voltage (Note 4)
PFO
Short-Circuit Source Current (Note 4)
PFI Comparator Response Time (Falling)
PFI Comparator Response Time (Rising) (Note 4)
Chip Enable Gating
CE
IN Threshold
CE
IN Pull-Up Current (Note 6)
CE
OUT Output Voltage
I
SINK
= 800μA
I
SOURCE
= 400μA
I
SOURCE
= 1μA, V
CC
= 0V
C
L
= 20pF
Output Source Current
Output Sink Current
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The
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denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V, V
BATT
= 2V, unless otherwise noted.
CONDITIONS
MIN
1.25
TYP
1.3
0.3
±0.01
2.3
1
3
17
2
40
8
0.45
1.9
3
0.3
V
OUT
– 0.50
V
OUT
– 0.05
30
15
20
±2
5
OSC SEL = 0V
OSC SEL = 0V, C
A
= 47pF
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MAX
1.35
±25
0.3
25
UNITS
V
mV/V
nA
V
V
μA
μA
μs
μs
μs
V
V
μA
V
V
V
ns
mA
mA
μA
μA
I
SINK
= 800μA
I
SOURCE
= 0.1μA
PFI = HIGH,
PFO
= 0V
PFI = LOW,
PFO
= V
OUT
ΔV
IN
= –20mV, V
OD
= 15mV
ΔV
IN
= 20mV, V
OD
= 15mV
with 10kΩ Pull-Up
V
IL
V
IH
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CE
IN Propagation Delay
CE
OUT Output Short-Circuit Current
Oscillator
OSC IN Input Current (Note 6)
OSC SEL Input Pull-Up Current (Note 6)
OSC IN Frequency Range
50
0
4
125
kHz
kHz
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to GND.
Note 3:
For military temperature range parts, consult the factory.
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Note 4:
The output pins of BATT ON,
LOW LINE, PFO, WDO, RESET
and
RESET have weak internal pull-ups of typically 3μA. However, external pull-
up resistors may be used when higher speed is required.
Note 5:
The external clock feeding into the circuit passes through the
oscillator before clocking the watchdog timer. Variation in the timeout
period is caused by phase errors which occur when the oscillator divides
the external clock by 64. The resulting variation in the timeout period is 64
plus one clock of jitter.
Note 6:
The input pins of
CE
IN, OSC IN and OSC SEL have weak internal
pull-ups which pull to the supply when the input pins are floating.
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FPGA/CPLD
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