MM54HCT640 MM74HCT640 Inverting Octal TRI-STATE Transceiver
MM54HCT643 MM74HCT643 True-Inverting Octal TRI-STATE Transceiver
February 1988
MM54HCT640 MM74HCT640
Inverting Octal TRI-STATE Transceiver
MM54HCT643 MM74HCT643
True-Inverting Octal TRI-STATE Transceiver
General Description
These TRI-STATE bi-directional transceivers utilize advanced
silicon-gate CMOS technology and are intended for two-way
asynchronous communication between data buses They
have high drive current outputs which enable high speed
operation even when driving large bus capacitances These
circuits possess the low power consumption of CMOS cir-
cuitry yet have speeds comparable to low power Schottky
TTL circuits
All devices are TTL input compatible and can drive up to 15
LS-TTL loads and all inputs are protected from damage due
to static discharge by diodes to V
CC
and ground
Both the MM54HCT640 MM74HCT640 and the
MM54HCT643 MM74HCT643 have one active low enable
input (G) and a direction control (DIR) When the DIR input
is high data flows from the A inputs to the B outputs When
DIR is low data flows from B to A The MM54HCT640
MM74HCT640 transfers inverted data from one bus to the
other The MM54HCT643 MM74HCT643 transfers inverted
data from the A bus to the B bus and non-inverted data from
the B bus to the A bus
MM54HCT MM74HCT devices are intended to interface be-
tween TTL and NMOS components and standard CMOS
devices These parts are also plug-in replacements for LS-
TTL devices and can be used to reduce power consumption
in existing designs
Features
Y
Y
Y
Y
TTL input compatible
Octal TRI-STATE outputs for
mP
bus applications
6 mA typical
High speed 16 ns typical propagation delay
Low power 80
mA
maximum (74HCT)
Connection Diagram
Dual-In-Line Packages
TL F 5370 – 1
TL F 5370 – 2
Top View
Order Number MM54HCT640 or MM74HCT640
Top View
Order Number MM54HCT643 or MM74HCT643
Truth Table
Control
Inputs
G
L
L
H
DIR
L
H
X
640
B data to A bus
A data to B bus
Isolation
Operation
643
B data to A bus
A data to B bus
Isolation
H
e
high level L
e
low level X
e
irrelevant
TRI-STATE is a registered trademark of National Semiconductor Corp
C
1995 National Semiconductor Corporation
TL F 5370
RRD-B30M105 Printed in U S A
2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
b
0 5 to
a
7 0V
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
I
OK
)
DC Output Current per pin (I
OUT
)
DC V
CC
or GND Current per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S O Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
b
1 5 to V
CC
a
1 5V
b
0 5 to V
CC
a
0 5V
g
20 mA
g
35 mA
g
70 mA
Absolute Maximum Ratings
(Notes 1
Operating Conditions
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
V
OUT
)
Operating Temp Range (T
A
)
MM74HCT
MM54HCT
Input Rise or Fall Times
(t
r
t
f
)
Min
45
0
Max
55
V
CC
Units
V
V
b
40
b
55
a
85
a
125
C
C
ns
500
b
65 C to
a
150 C
600 mW
500 mW
260 C
DC Electrical Characteristics
V
CC
e
5V
g
10% (unless otherwise specified)
Symbol
Parameter
Conditions
T
A
e
25 C
Typ
V
IH
V
IL
V
OH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
V
IN
e
V
IH
or V
IL
l
I
OUT
l
e
20
mA
l
I
OUT
l
e
6 0mA V
CC
e
4 5V
l
I
OUT
l
e
7 2mA V
CC
e
5 5V
V
IN
e
V
IH
or V
IL
l
I
OUT
l
e
20
mA
l
I
OUT
l
e
6 0mA V
CC
e
4 5V
l
I
OUT
l
e
7 2mA V
CC
e
5 5V
V
IN
e
V
CC
or GND
V
IH
or V
IL
V
OUT
e
V
CC
or GND
Enable G
e
V
IH
V
IN
e
V
CC
or GND
I
OUT
e
0mA
V
IN
e
2 4V or 0 5V
(Note 4)
Note 1
Note 2
Note 3
Note 4
74HCT
T
A
eb
40 to 85 C
20
08
54HCT
T
A
eb
55 to 125 C
20
08
Units
Guaranteed Limits
20
08
V
V
V
CC
42
52
0
02
02
V
CC
-0 1
3 98
4 98
01
0 26
0 26
g
0 1
g
0 5
V
CC
-0 1
3 84
4 84
01
0 33
0 33
g
1 0
g
5 0
V
CC
-0 1
37
47
01
04
04
g
1 0
g
10
V
V
V
V
V
V
mA
mA
V
OL
Maximum Low Level
Voltage
I
IN
I
OZ
Maximum Input
Current
Maximum TRI-STATE
Output Leakage
Current
Maximum Quiescent
Supply Current
I
CC
8
06
10
80
13
160
15
mA
mA
Absolute Maximum Ratings are those values beyond which damage to the device may occur
Unless otherwise specified all voltages are referenced to ground
Power Dissipation temperature derating
plastic ‘‘N’’ package
b
12 mW C from 65 C to 85 C ceramic ‘‘J’’ package
b
12 mW C from 100 C to 125 C
Measured per input All other inputs held at V
CC
or ground
AC Electrical Characteristics
MM54HCT640 MM74HCT640
V
CC
e
5 0V t
r
e
t
f
e
6 ns T
A
e
25 C (unless otherwise specified)
Symbol
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
Parameter
Maximum Output
Propagation Delay
Maximum Output
Enable Time
Maximum Output
Disable Time
Conditions
C
L
e
45 pF
C
L
e
45 pF
R
L
e
1 kX
C
L
e
5 pF
R
L
e
1 kX
Typ
16
29
20
Guaranteed
Limits
20
40
25
Units
ns
ns
ns
2
AC Electrical Characteristics
MM54HCT640
V
CC
e
5 0V
g
10% t
r
e
t
f
e
6 ns (unless otherwise specified)
Symbol
t
PHL
t
PLH
t
PZH
t
PZL
t
PHZ
t
PLZ
t
THL
t
TLH
C
IN
C
OUT
C
PD
Parameter
Maximum Output
Propagation Delay
Maximum Output
Enable Time
Maximum Output
Disable Time
Maximum Output
Rise and Fall Time
Maximum Input
Capacitance
Maximum Output
Input Capacitance
Power Dissipation
Capacitance (Note 5)
(per output)
G
e
V
CC
G
e
GND
Conditions
C
L
e
50 pF
C
L
e
150 pF
R
L
e
1kX
R
L
e
1kX
C
L
e
50 pF
C
L
e
50 pF
C
L
e
50 pF
MM74HCT640
74HCT
T
A
eb
40 to 85 C
29
38
38
38
15
15
25
54HCT
T
A
eb
55 to 125 C
34
45
45
45
18
15
25
T
A
e
25 C
Typ
17
24
23
21
8
10
20
7
100
MM74HCT643
Guaranteed
Limits
20
40
25
23
30
30
30
12
15
25
Units
ns
ns
ns
ns
ns
pF
pF
pF
pF
Guaranteed Limits
AC Electrical Characteristics
MM54HCT643
V
CC
e
5 0V t
r
e
t
f
e
6 ns T
A
e
25 C (unless otherwise specified)
Symbol
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
Parameter
Maximum Output
Propagation Delay
Maximum Output
Enable Time
Maximum Output
Disable Time
Conditions
C
L
e
45 pF
C
L
e
45 pF
R
L
e
1 kX
C
L
e
5 pF
R
L
e
1 kX
Typ
16
29
20
Units
ns
ns
ns
AC Electrical Characteristics
MM54HCT643
V
CC
e
5 0V
g
10% t
r
e
t
f
e
6 ns (unless otherwise specified)
Symbol
t
PHL
t
PLH
t
PZH
t
PZL
t
PHZ
t
PLZ
t
THL
t
TLH
C
IN
C
OUT
C
PD
Parameter
Maximum Output
Propagation Delay
Maximum Output
Enable Time
Maximum Output
Disable Time
Maximum Output
Rise and Fall Time
Maximum Input
Capacitance
Maximum Output
Input Capacitance
Power Dissipation
Capacitance (Note 5)
(per output)
G
e
V
CC
G
e
GND
Conditions
C
L
e
50 pF
C
L
e
150 pF
R
L
e
1 kX
R
L
e
1 kX
C
L
e
50 pF
C
L
e
50 pF
C
L
e
50 pF
MM74HCT643
74HCT
T
A
eb
40 to 85 C
29
38
38
38
15
15
25
54HCT
T
A
eb
55 to 125 C
34
45
45
45
18
15
25
T
A
e
25 C
Typ
17
24
23
21
8
10
20
7
100
23
30
30
30
12
15
25
Units
ns
ns
ns
ns
ns
ns
pF
pF
pF
pF
Guaranteed Limits
Note 5
C
PD
determines the no load power consumption P
D
e
C
PD
V
CC2
f
a
I
CC
V
CC
The no load dynamic current consumption I
S
e
C
PD
V
CC
a
I
CC
3
MM54HCT640 MM74HCT640 Inverting Octal TRI-STATE Transceiver
MM54HCT643 MM74HCT643 True-Inverting Octal TRI-STATE Transceiver
Physical Dimensions
inches (millimeters)
Cavity Dual-In line Package (J)
Order Number MM54HCT640J MM54HCT643J MM74HCT640J or MM74HCT643J
See NS Package J20A
LIFE SUPPORT POLICY
Moulded Dual-In line Package (N)
Order Number MM74HCT640N or MM74HCT643N
See NS Package N20A
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
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failure to perform when properly used in accordance
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to the user
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