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NVD5C478NLT4G

产品描述MOSFET T6 40V DPAK EXP
产品类别分立半导体    晶体管   
文件大小83KB,共6页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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NVD5C478NLT4G概述

MOSFET T6 40V DPAK EXP

NVD5C478NLT4G规格参数

参数名称属性值
Brand NameON Semiconductor
是否无铅不含铅
厂商名称ON Semiconductor(安森美)
包装说明SMALL OUTLINE, R-PSSO-G2
制造商包装代码369C
Reach Compliance Codenot_compliant
Factory Lead Time4 weeks
Samacsys DescriptionT6 40V DPAK EXPANSION AND
雪崩能效等级(Eas)98 mJ
外壳连接DRAIN
配置SINGLE
最小漏源击穿电压40 V
最大漏极电流 (Abs) (ID)45 A
最大漏极电流 (ID)45 A
最大漏源导通电阻0.0118 Ω
FET 技术METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss)25 pF
JESD-30 代码R-PSSO-G2
JESD-609代码e3
湿度敏感等级1
元件数量1
端子数量2
工作模式ENHANCEMENT MODE
最高工作温度175 °C
最低工作温度-55 °C
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式SMALL OUTLINE
极性/信道类型N-CHANNEL
最大功率耗散 (Abs)30 W
最大脉冲漏极电流 (IDM)220 A
参考标准AEC-Q101
表面贴装YES
端子面层Tin (Sn)
端子形式GULL WING
端子位置SINGLE
晶体管元件材料SILICON

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NVD5C478NL
Power MOSFET
40 V, 7.7 mW, 45 A, Single N−Channel
Features
Low R
DS(on)
to Minimize Conduction Losses
Low Q
G
and Capacitance to Minimize Driver Losses
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
V
(BR)DSS
40 V
R
DS(on)
7.7 mW @ 10 V
11.8 mW @ 4.5 V
I
D
45 A
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
qJC
(Notes 1 & 3)
Power Dissipation R
qJC
(Note 1)
Continuous Drain
Current R
qJA
(Notes 1, 2 & 3)
Power Dissipation R
qJA
(Notes 1 & 2)
Pulsed Drain Current
Steady
State
T
C
= 25°C
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
T
L
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
40
"20
45
32
30
15
14
9.9
3.0
1.5
220
−55 to
175
25
98
260
A
°C
A
mJ
°C
W
A
W
Unit
V
V
A
D
G
S
N−CHANNEL MOSFET
4
1 2
3
DPAK
CASE 369C
STYLE 2
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, I
L(pk)
= 3.4 A)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
AYWW
5C
478NLG
2
1 Drain 3
Gate Source
A
= Assembly Location
Y
= Year
WW
= Work Week
5C478NL = Device Code
G
= Pb−Free Package
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case (Drain) (Note 1)
Junction−to−Ambient − Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
5.0
50
Unit
°C/W
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2017
1
January, 2018 − Rev. 0
Publication Order Number:
NVD5C478NL/D

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