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74AC109SJ

产品描述Flip Flops Dual J-K Flip-Flop
产品类别半导体    逻辑   
文件大小335KB,共12页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
标准
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74AC109SJ概述

Flip Flops Dual J-K Flip-Flop

74AC109SJ规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ON Semiconductor(安森美)
产品种类
Product Category
Flip Flops
RoHSDetails
Number of Circuits2
Logic Family74AC
Logic TypeJ-K Positive Edge Triggered Flip-Flop
PolarityInverting/Non-Inverting
Input TypeSingle-Ended
输出类型
Output Type
Differential
传播延迟时间
Propagation Delay Time
14 ns
High Level Output Current- 24 mA
Low Level Output Current24 mA
电源电压-最小
Supply Voltage - Min
2 V
电源电压-最大
Supply Voltage - Max
6 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
SOP-16
系列
Packaging
Tube
FunctionFlip-Flop
高度
Height
1.8 mm
长度
Length
10.2 mm
Quiescent Current2 uA
宽度
Width
5.3 mm
Number of Channels2
Number of Input Lines5
Number of Output Lines2
工作电源电压
Operating Supply Voltage
2 V to 6 V
Reset TypeSet, Reset
工厂包装数量
Factory Pack Quantity
47
单位重量
Unit Weight
0.008536 oz

文档预览

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74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop
March 2007
74AC109, 74ACT109
Dual JK Positive Edge-Triggered Flip-Flop
Features
I
CC
reduced by 50%
Outputs source/sink 24mA
ACT109 has TTL-compatible inputs
tm
General Description
The AC/ACT109 consists of two high-speed completely
independent transition clocked JK flip-flops. The clocking
operation is independent of rise and fall times of the
clock waveform. The JK design allows operation as a
D-Type flip-flop (refer to AC/ACT74 data sheet) by
connecting the J and K inputs together.
Asynchronous Inputs:
LOW input to S
D
(Set) sets Q to HIGH level
LOW input to C
D
(Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes both
Q and Q HIGH
Ordering Information
Order
Number
74AC109SC
74AC109SJ
74AC109MTC
74ACT109SC
74AC109MTC
74ACT109PC
Package
Number
M16A
M16D
MTC16
M16A
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Descriptions
Pin Names
J
1
, J
2
, K
1
, K
2
CP
1
, CP
2
C
D1
, C
D2
S
D1
, S
D2
Q
1
, Q
2
, Q
1
, Q
2
Description
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
FACT™ is a trademark of Fairchild Semiconductor Corporation
.
©1988 Fairchild Semiconductor Corporation
74AC109, 74ACT109 Rev. 1.5
www.fairchildsemi.com

74AC109SJ相似产品对比

74AC109SJ 74AC109MTCX 74AC109SC 74AC109MTC_Q 74AC109SCX 74AC109SJX
描述 Flip Flops Dual J-K Flip-Flop Flip Flops Dual J-K Flip-Flop Flip Flops Dual J-K Flip-Flop Flip Flops Dual J-K Flip-Flop Flip Flops Dual J-K Flip-Flop Flip Flops Dual J-K Flip-Flop
Product Attribute Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value Attribute Value
制造商
Manufacturer
ON Semiconductor(安森美) ON Semiconductor(安森美) ON Semiconductor(安森美) ON Semiconductor(安森美) ON Semiconductor(安森美) ON Semiconductor(安森美)
产品种类
Product Category
Flip Flops Flip Flops Flip Flops Flip Flops Flip Flops Flip Flops
RoHS Details Details Details N Details Details
Number of Circuits 2 2 2 2 2 2
Logic Family 74AC 74AC 74AC 74AC 74AC 74AC
Logic Type J-K Positive Edge Triggered Flip-Flop J-K Positive Edge Triggered Flip-Flop J-K Positive Edge Triggered Flip-Flop D-Type Flip-Flop J-K Positive Edge Triggered Flip-Flop J-K Positive Edge Triggered Flip-Flop
Polarity Inverting/Non-Inverting Inverting/Non-Inverting Inverting/Non-Inverting Inverting/Non-Inverting Inverting/Non-Inverting Inverting/Non-Inverting
Input Type Single-Ended Single-Ended Single-Ended Single-Ended Single-Ended Single-Ended
输出类型
Output Type
Differential Differential Differential Differential Differential Differential
传播延迟时间
Propagation Delay Time
14 ns 14 ns 14 ns 14 ns 14 ns 14 ns
High Level Output Current - 24 mA - 24 mA - 24 mA - 24 mA - 24 mA - 24 mA
Low Level Output Current 24 mA 24 mA 24 mA 24 mA 24 mA 24 mA
电源电压-最小
Supply Voltage - Min
2 V 2 V 2 V 2 V 2 V 2 V
电源电压-最大
Supply Voltage - Max
6 V 6 V 6 V 6 V 6 V 6 V
最小工作温度
Minimum Operating Temperature
- 40 C - 40 C - 40 C - 40 C - 40 C - 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C + 85 C + 85 C + 85 C + 85 C + 85 C
安装风格
Mounting Style
SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT SMD/SMT
封装 / 箱体
Package / Case
SOP-16 TSSOP-16 SOIC-16 TSSOP-16 SOIC-16 SOP-16
Function Flip-Flop Dual J-K Flip-Flop Flip-Flop J-K Type Dual J-K Flip-Flop Dual J-K Flip-Flop
高度
Height
1.8 mm 0.9 mm 1.5 mm 0.9 mm 1.5 mm 1.8 mm
长度
Length
10.2 mm 5 mm 10 mm 5 mm 10 mm 10.2 mm
Quiescent Current 2 uA 2 uA 2 uA 2 uA 2 uA 2 uA
宽度
Width
5.3 mm 4.4 mm 4 mm 4.4 mm 4 mm 5.3 mm
Number of Channels 2 2 2 2 2 2
Number of Input Lines 5 5 5 2 5 5
Number of Output Lines 2 2 2 1 2 2
工作电源电压
Operating Supply Voltage
2 V to 6 V 2 V to 6 V 2 V to 6 V 2 V to 6 V 2 V to 6 V 2 V to 6 V
Reset Type Set, Reset Set, Reset Set, Reset Set, Reset Set, Reset Set, Reset
单位重量
Unit Weight
0.008536 oz 0.006102 oz 0.023492 oz 0.006102 oz 0.023492 oz 0.008536 oz
系列
Packaging
Tube Reel Tube Tube Reel Reel
工厂包装数量
Factory Pack Quantity
47 2500 48 - 2500 2000

 
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