MMA022AA
DC to 30GHz Broadband MMIC
Low-Noise Amplifier
Features
• Low noise, ultra-flat gain 6-
20GHz:
▪ 2.5dB NF, 18 ± 0.3dB gain
• Excellent 1.5-20GHz performance:
▪ Very flat gain (17 ± 0.6dB)
▪ High Psat at 20GHz (20dBm)
▪ High P1dB at 20GHz (17dBm)
• Wideband operation: 0.04-30GHz
• Good input / output return loss
• High isolation
• >30dB dynamic gain control
• Integrated temperature-referenced
power detector output
• 100% DC, RF, and visually tested
• Size: 2390x920um (94.1x36.2mil)
Description
The MMA022AA is an eight stage traveling
wave amplifier. The amplifier has been
designed for low noise, flat gain, and good
return loss to 30GHz. The amplifier typically
has 2.5dB NF and 17dB gain from 6-20GHz,
and 16dB gain from 0.04-30GHz.
Application
The MMA022AA Broadband MMIC Low-Noise
Amplifier is designed for low-noise and
broadband flat-gain applications in RF and
microwave communications, test equipment
and military systems. By using specific
external components, the bandwidth
of operation can be extended below 40MHz.
Key Characteristics:
Vdd=5.0V, Idd=150mA, Zo=50Ω
Specifications pertain to wafer measurements with RF probes and DC bias cards @ 25°C
6 - 20GHz
Parameter
S21 (dB)
Flatness (±dB)
S11 (dB)
S22 (dB)
S12 (dB)
P1dB (dBm)
Psat (dBm)
Pout @ 16dB (dBm)
NF (dB)
RF
det
(mV/mW)
Description
Small Signal Gain
Gain Flatness
Input Match
Output Match
Reverse Isolation
1dB Compressed Output Power
Saturated Output Power
Output Power at 16dB Gain
Noise Figure
RF Detector Sensitivity
Min
16
-
-
-
-
16
19
17
-
-
Typ
17
0.3
-16
-18
-35
17
20
18.5
2.5
0.5
Max
-
0.6
-13
-15
-30
-
-
-
-
-
1.5 - 20GHz
Min
16
-
-
-
-
16
19
17
-
-
Typ
17
0.6
-16
-18
-35
17
20
18.5
5
0.5
Max
-
1.0
-13
-15
-30
-
-
-
-
-
0.04 - 30GHz
Min
14
-
-
-
-
12
14
-
-
-
Typ
16.5
1.5
-10
-18
-30
13.5
16.5
-
5.5
0.5
Max
-
2.0
-8
-15
-25
-
-
-
-
-
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MMA022AA
Typical Performance
S21
Noise Figure
S11, S22
S12
Output Power
Group Delay
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MMA022AA
Table 1: Supplemental Specifications
Parameter
Vdd
Idd
Vg1
Vg2
P
in
P
dc
T
ch
Θ
ch
Description
Drain Bias Voltage
Drain Bias Current
1st Gate Bias Voltage
2nd Gate Bias Voltage
Input Power (CW)
Power Dissipation
Channel Temperature
Thermal Resistance (T
case
=85˚C)
Min
3V
-
-2V
Vdd - Vg2 < 7V
-
-
-
-
Typ
5V
150mA
-
N/C
-
0.75W
-
18˚ C/W
Max
8V
250mA
0V
+4V
20dBm
-
150˚C
-
Caution, ESD
Sensitive Device
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MMA022AA
DC Bias:
The MMA022AA is biased by applying a positive voltage to the drain (Vdd), then setting the drain
current (Idd) using a negative voltage on the gate (Vg1).
When zero volts is applied to the gate, the drain to source channel is open; this results in high Idd.
When Vg1 is biased negatively, the channel is pinched off and Idd decreases.
The nominal bias is Vdd=5.0V, Idd=150mA. Improved noise or power performance can be achieved
with application-specific biasing.
Gain Control:
Dynamic gain control is available when operating the amplifier in the linear gain region. Negative
voltage applied to the second gate (Vg2) reduces amplifier gain.
RF Power Detection:
RF output power can be calculated from the difference between the RF detector voltage and the
DC detector voltage, minus a DC offset. Please consult the power detector application note available
from the Microsemi webpage.
Low-Frequency Use:
The MMA022AA has been designed so that the bandwidth can be extended to low frequencies.
The low end corner frequency of the device is primarily determined by the external biasing
and AC coupling circuitry.
Matching:
The amplifier incorporates on- chip termination resistors on the RF input and output. These
resistors are RF grounded through on-chip capacitors, which are small and become open circuits
at frequencies below 1GHz.
A pair of gate and drain termination bypass pads are provided for connecting external capacitors
required for the low frequency extension network. These capacitors should be 10x the value
of the DC blocking capacitors.
DC Blocks:
The amplifier is DC coupled to the RF input and output pads; DC voltage on these pads must
be isolated from external circuitry.
For operation above 2GHz, a series DC-blocking capacitor with minimum value of 20pF
is recommended; operation above 40MHz requires a minimum of 120pF.
Bias Inductor:
DC bias applied to the drain (Vdd) must be decoupled with an off-chip RF choke inductor.
The amount of bias inductance will determine the low frequency operating point. Inductive biasing
can also be applied to the chip through the RF output.
For many applications above 2GHz, a bondwire from the Vdd pad will suffice as the biasing inductor.
Ensure the correct bond length as shown in the assembly diagrams.
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MMA022AA
Simplified Circuit Schematic
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