CM3196
2A Sink/Source DDR-I, -II Bus Termination Regulator
Features
•
•
•
•
•
•
•
•
Ideal for DDR-I, -II V
TT
applications
Sinks and sources 2A for DDR-I, 0.6A for DDR-II
Shutdown input to support ACPI states
Operates down to 1.5V input voltage
Integrated power MOSFETs
Overcurrent protection
Over temperature protection
Excellent accuracy
V
TT
= V
REF
± 30mV
V
TT
= V
DDQ
/2 ± 2%
8-pin SOIC or PSOP package
Lead-free versions available
Product Description
The CM3196 is a sinking and sourcing regulator specif-
ically designed for DDR-I, -II V
TT
bus termination. The
output voltage accurately tracks V
DDQ
/2. For DDR-I it
can source and sink current up to 2A with a load regu-
lation of 0.5%. This current adequately serves both sin-
gle and dual channel DDR-I memory systems. For
power conscious notebook applications, the CM3196
also operates from a V
DDQ
of 1.5V or 1.8V with less
current drive. For DDR-II applications, the CM3196
provides up to 0.6A at 0.9V to drive the memory con-
troller V
TT.
For boards which support Suspend to RAM (STR)
functionality, the CM3196 provides a Shutdown (SD)
pin. When SD is set low, V
TT
will be in tri-state mode,
causing the output to go high impedance. In this mode,
CM3196 power is saved by significantly reducing the
quiescent current. V
REF
voltage remains V
DDQ
/2.
The CM3196 provides overcurrent and over tempera-
ture protection. These features protect the chip from
excessive heating due to high current and high temper-
ature.
The CM3196 is housed in an 8-pin SOIC or PSOP
package and is available with optional lead-free finish-
ing.
•
•
Applications
•
•
•
DDR-I, -II memory termination
Active termination buses
Graphics card memory termination
Simplified Electrical Schematic
AV
IN
V
DDQ
PV
IN
SD
Over Temp
Over Current
Reference
50K
Driver
V
REF
OUT
IN
V
TT
50K
Buffer
V
SENSE
GND
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲
Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
1
CM3196
PACKAGE / PINOUT DIAGRAM
TOP VIEW
GND
SD
V
SENSE
V
REF
1
2
3
4
8
7
6
5
TOP VIEW
V
TT
PV
IN
AV
IN
V
DDQ
GND
SD
V
SENSE
V
REF
1
2
3
4
8
7
GND
6
5
V
TT
PV
IN
AV
IN
V
DDQ
8-lead SOIC
Note: This drawing is not to scale.
8-lead PSOP
PIN DESCRIPTIONS
LEAD(S)
1
2
3
4
5
6
7
8
NAME
GND
SD
V
SENSE
V
REF
V
DDQ
AV
IN
PV
IN
V
TT
DESCRIPTION
Ground
Shutdown input, active low
Feedback from V
TT
input
Reference output, V
DDQ
/2
V
DDQ
input
Analog circuit power input
Power transistor input
Output
Ordering Information
PART NUMBERING INFORMATION
Standard Finish
Ordering Part
Pins
8
8
Package
SOIC-8
PSOP-8
Number
1
CM3196-12SN
CM3196-12SB
Part Marking
CM3196-12SN
CM3196-12SB
Lead-free Finish
Ordering Part
Number
1
CM3196-12SM
CM3196-12SH
Part Marking
CM3196-12SM
CM3196-12SH
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲
Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
04/22/04
CM3196
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
AV
IN
Operating Supply Voltage
V
DDQ
Input Voltage
Pin Voltages
V
TT
Output
Any other pins
Storage Temperature Range
Operating Temperature Range
Ambient
Junction
Power Dissipation (See note 1)
RATING
7
7
7
7
-40 to +150
-40 to +85
-40 to +150
Internally Limited
UNITS
V
V
V
V
°C
°C
°C
W
Note 1: These devices must be derated based on thermal resistance at elevated temperatures. The device packaged in an 8-pin
SOIC package must be derated at
θ
JA
= 151
°
C/W and the 8-pin PSOP must be derated at
θ
JA
= 43
°
C/W.
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲
Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
3
CM3196
Specifications (cont’d)
DDR-I Features
STANDARD OPERATING CONDITIONS
PARAMETER
V
DDQ
AV
IN
PV
IN
Ambient Operating Temperature
C
VOUT
VALUE
2.5
2.5
2.5
-40 to +85
220 +20%
UNITS
V
V
V
°C
µF
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYMBOL
V
IN
PARAMETER
Input Voltage Range
PV
IN
pin
AV
IN
pin
AV
IN
Quiescent Current
AV
IN
Quiescent Current
in Shut Down
V
TT
Output Voltage
PV
IN
= 2.5V
PV
IN
= 1.8V
PV
IN
= 1.5V
Output Reference Voltage
Output Offset from V
REF
V
REF
Output Impedance
V
DDQ
Input Impedance
V
TT
Current Limit
Shutdown Logic
Logic "1" Level
Logic "0" Level
Shutdown Temperature
Thermal Hysteresis
1.5
0.4
150
30
I
REF
= -5µA to 5µA
I
TT
= 0A
V
SD
= logic "0"
CONDITIONS
MIN
2.2
2.2
TYP
2.5
2.5
450
115
MAX
AV
IN
5.5
UNITS
V
V
µA
µA
I
CC
I
CCSD
V
TT
I
LOAD
= 0 to 2A or I
LOAD
= -2A to 0A
I
LOAD
= 0 to 0.75A or I
LOAD
= -0.75A to 0A
I
LOAD
= 0 to 0.3A or I
LOAD
= -0.3A to 0A
1.225
1.225
1.225
1.225
-30
1.250
1.250
1.250
1.250
1.275
1.275
1.275
1.275
30
V
V
V
V
mV
kΩ
kΩ
A
V
V
°C
°C
V
REF
VOS
VTT
Z
REF
Z
VDDQ
I
LIM
V
SD
V
DDQ
= 2.5V, I
REF
= 0A
5
100
2.5
T
DISABLE
T
HYST
Note 1: Operating characteristics are over Standard Operating Conditions unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲
Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
04/22/04
CM3196
Specifications (cont’d)
DDR-II Features
STANDARD OPERATING CONDITIONS
PARAMETER
V
DDQ
AV
IN
PV
IN
Ambient Operating Temperature
C
VOUT
VALUE
1.8
3.3
1.8
-40 to +85
220 +20%
UNITS
V
V
V
°C
µF
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYMBOL
V
IN
PARAMETER
Input Voltage Range
PV
IN
pin
AV
IN
pin
AV
IN
Quiescent Current
AV
IN
Quiescent Current
in Shut Down
V
TT
Output Voltage
PV
IN
= 1.8V
PV
IN
= 1.5V
AV
IN
> 2.2V, PV
IN
> 2.2V
Output Reference Voltage
Output Offset from V
REF
V
REF
Output Impedance
V
DDQ
Input Impedance
V
TT
Current Limit
Shutdown Logic
Logic "1" Level
Logic "0" Level
Shutdown Temperature
Thermal Hysteresis
1.5
0.4
150
30
I
REF
= -5µA to 5µA
I
TT
= 0A
V
SD
= logic "0"
CONDITIONS
MIN
1.5
2.2
TYP
1.8
3.3
450
115
MAX
AV
IN
5.5
UNITS
V
V
µA
µA
I
CC
I
CCSD
V
TT
I
LOAD
= 0 to 0.6A or I
LOAD
= -0.6A to 0A
I
LOAD
= 0 to 0.3A or I
LOAD
= -0.3A to 0A
I
LOAD
= 0 to 1.2A or I
LOAD
= -1.2A to 0A
0.882
0.882
0.882
0.882
-30
0.9
0.9
0.9
0.9
0.918
0.918
0.918
0.918
30
V
V
V
V
mV
kΩ
kΩ
A
V
V
°C
°C
V
REF
VOS
VTT
Z
REF
Z
VDDQ
I
LIM
V
SD
V
DDQ
= 1.8V, I
REF
= 0A
5
100
2.5
T
DISABLE
T
HYST
Note 1: Operating characteristics are over Standard Operating Conditions unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
04/22/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲
Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
5
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