TC74ACT240,244P/F/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74ACT240P,TC74ACT240F, TC74ACT240FT
TC74ACT244P,TC74ACT244F, TC74ACT244FT
Octal Bus Buffer
TC74ACT240P/F/FT
TC74ACT244P/F/FT
Inverted, 3-State
Outputs
Non-Inverted, 3-State
Outputs
TC74ACT240P, TC74ACT244P
The TC74ACT240 and 244 are advanced high speed CMOS
OCTAL BUS BUFFERs fabricated with silicon gate and
double-layer metal wiring C
2
MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The 74ACT240 is an inverting 3-state buffer while the
74ACT244 is non-inverting. Both devices have two active-low
output enables.
These devices are designed to be used in such applications as
3-state memory address drivers.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74ACT240F, TC74ACT244F
TC74ACT240FT, TC74ACT244FT
Features
•
•
•
•
High speed: t
pd
=
5.0 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
8
μA
(max) at Ta
=
25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
V
IH
=
2.0 V (min)
Symmetrical output impedance: |I
OH
|
=
I
OL
=
24 mA (min)
Capability of driving 50
Ω
transmission lines.
Balanced propagation delays: t
pLH
∼
t
pHL
−
Pin and function compatible with 74F240/244
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
•
•
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.08 g (typ.)
1
2007-10-01
TC74ACT240,244P/F/FT
Pin Assignment
TC74ACT240
1G
1A1
2Y 4
1A2
2Y3
1A3
2Y 2
1A4
2Y1
1
2
3
4
5
6
7
8
9
20
19
18
17
TC74ACT244
V
CC
2G
1Y1
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
(top view)
V
CC
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
2A4
1Y 2
2A3
1Y3
2A2
1Y 4
2A1
16
15
14
13
12
11
(top view)
GND 10
GND 10
IEC Logic Symbol
TC74ACT240
1G
1A1
1A2
1A3
1A4
(1)
(2)
(4)
(6)
(8)
EN
(18)
(16)
(14)
(12)
1Y1
1Y 2
1Y3
1Y 4
1G
1A1
1A2
1A3
1A4
(1)
(2)
(4)
(6)
(8)
TC74ACT244
EN
(18)
(16)
(14)
(12)
1Y1
1Y2
1Y3
1Y4
2G
2A1
2A2
2A3
2A4
(19)
(11)
(13)
(15)
(17)
EN
(9)
(7)
(5)
(3)
2Y1
2Y 2
2Y3
2Y 4
2G
2A1
2A2
2A3
2A4
(19)
(11)
(13)
(15)
(17)
EN
(9)
(7)
(5)
(3)
2Y1
2Y2
2Y3
2Y4
Truth Table
Inputs
Outputs
G
L
L
H
A
n
L
H
X
Y
n
(244)
L
H
Z
Y
n
(240)
H
L
Z
X: Don’t care
Z: High impedance
2
2007-10-01
TC74ACT240,244P/F/FT
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+ 0.5
−0.5
to V
CC
+ 0.5
±20
±50
±50
±200
500 (DIP) (Note 2)/180 (SOP/TSSOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta =
−40
to 65°C. From Ta = 65 to 85°C a derating factor of
−10
mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
4.5 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 10
Unit
V
V
V
°C
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
3
2007-10-01
TC74ACT240,244P/F/FT
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
―
4.5
to
5.5
4.5
to
5.5
4.5
4.5
(Note)
5.5
4.5
4.5
(Note)
5.5
5.5
5.5
5.5
5.5
Min
2.0
Ta = 25°C
Typ.
―
Max
―
Ta =
−40
to 85°C
Min
2.0
Max
―
V
Unit
High-level input
voltage
Low-level input
voltage
V
IH
V
IL
―
I
OH
=
−50 μA
V
IN
= V
IH
or I
OH
=
−24
mA
V
IL
I
OH
=
−75
mA
I
OL
= 50
μA
V
IN
= V
IH
or I
OL
= 24 mA
V
IL
I
OL
= 75 mA
V
IN
= V
IH
or V
IL
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND
Per input: V
IN
= 3.4 V
Other input: V
CC
or GND
―
4.4
3.94
―
―
―
―
―
―
―
―
―
4.5
―
―
0.0
―
―
―
―
―
―
0.8
―
―
―
0.1
0.36
―
±0.5
±0.1
8.0
1.35
―
4.4
3.80
3.85
―
―
―
―
―
―
―
0.8
―
―
―
0.1
0.44
1.65
±5.0
±1.0
80.0
1.5
V
High-level output
voltage
V
OH
V
Low-level output
voltage
V
OL
V
3-state output
off-state current
Input leakage
current
Quiescent supply
current
I
OZ
I
IN
I
CC
I
C
μA
μA
μA
mA
Note:
This spec indicates the capability of driving 50
Ω
transmission lines.
One output should be tested at a time for a 10 ms maximum duration.
AC Characteristics
(C
L
= 50 pF, R
L
= 500
Ω,
input: t
r
= t
f
= 3 ns)
Characteristics
Symbol
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
C
IN
C
OUT
C
PD
TC74ACT240
Test Condition
V
CC
(V)
Propagation delay
time
Output enable time
―
5.0 ± 0.5
Min
―
Ta = 25°C
Typ.
5.7
Max
8.0
Ta =
−40
to 85°C
Min
1.0
Max
9.0
ns
Unit
―
5.0 ± 0.5
―
6.0
9.0
1.0
10.5
ns
Output disable time
Input capacitance
Output capacitance
Power dissipation
capacitance
―
―
―
5.0 ± 0.5
―
―
―
―
―
5.9
5
10
25
29
8.5
10
―
―
―
1.0
―
―
―
―
10.0
10
―
―
―
ns
pF
pF
pF
(Note) TC74ACT244
Note:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= C
PD
·V
CC
·f
IN
+ I
CC
/8 (per bit)
4
2007-10-01
TC74ACT240,244P/F/FT
Package Dimensions
Weight: 1.30 g (typ.)
5
2007-10-01
FPGA/CPLD
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