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© Nexperia B.V. (year). All rights reserved.
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Team Nexperia
PUSB3FR4
10
ESD protection for ultra high-speed interfaces
Rev. 1 — 26 January 2015
Product data sheet
1. Product profile
1.1 General description
The device is designed to protect high-speed interfaces such as SuperSpeed USB 3.1 at
10 Gbps, High-Definition Multimedia Interface (HDMI), DisplayPort, external Serial
Advanced Technology Attachment (eSATA) and Low Voltage Differential Signaling (LVDS)
interfaces against ElectroStatic Discharge (ESD).
The device includes four high-level ESD protection diode structures. They protect
sensitive transmitters and receivers for ultra high-speed signal lines. The device is
encapsulated in a leadless small DFN2510A-10 (SOT1176-1) plastic package.
All signal lines are protected by a special diode configuration offering ultra low line
capacitance of only 0.29 pF. These diodes utilize a snap-back structure in order to provide
protection to downstream components from ESD voltages up to
15
kV contact exceeding
IEC 61000-4-2, level 4.
XS
ON
1.2 Features and benefits
System-level ESD protection for USB 2.0 and SuperSpeed USB 3.1 at 10 Gbps,
HDMI, DisplayPort, eSATA and LVDS
Line capacitance of only 0.29 pF for each channel
Outstanding system protection: extremely deep snap-back combined with dynamic
resistance of only 0.27
.
All signal lines with integrated rail-to-rail clamping diodes for downstream
ESD protection of
15
kV exceeding IEC 61000-4-2, level 4
Matched 0.5 mm trace spacing
Signal lines with
0.05 pF matching capacitance between signal pairs
Design-friendly ‘pass-through’ signal routing
1.3 Applications
The device is designed for high-speed receiver and transmitter port protection:
Smartphones, tablet computers, Mobile Internet Devices (MID) and portable devices
TVs and monitors
DVD recorders and players
Notebooks, main board graphic cards and ports
Set-top boxes and game consoles
NXP Semiconductors
PUSB3FR4
ESD protection for ultra high-speed interfaces
2. Pinning information
Table 1.
Pin
1
2
3
4
5
6
7
8
9
10
CH1
CH2
GND
CH3
CH4
n.c.
n.c.
GND
n.c.
n.c.
Pinning
Description
channel 1 ESD protection
channel 2 ESD protection
ground
channel 3 ESD protection
channel 4 ESD protection
not connected
not connected
ground
not connected
not connected
aaa-016329
Symbol
Simplified outline
10
9
8
7
6
Graphic symbol
1
2
4
5
1
2
3
4
5
Transparent top view
3,8
=
3. Ordering information
Table 2.
Ordering information
Package
Name
PUSB3FR4
DFN2510A-10
Description
Version
plastic extremely thin small outline package;
SOT1176-1
no leads; 10 terminals; body 1
2.5
0.5 mm
Type number
4. Marking
Table 3.
Marking codes
Marking code
FR
Type number
PUSB3FR4
5. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
V
ESD
Parameter
input voltage
electrostatic discharge
voltage
IEC 61000-4-2, level 4
contact discharge
air discharge
I
PPM
T
amb
T
stg
[1]
PUSB3FR4
Conditions
[1]
Min
0.5
15
15
7
40
55
Max
+3.3
+15
+15
7
+85
+125
Unit
V
kV
kV
A
C
C
rated peak pulse current
ambient temperature
storage temperature
t
p
= 8/20
s
All pins to ground.
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 26 January 2015
2 of 15
NXP Semiconductors
PUSB3FR4
ESD protection for ultra high-speed interfaces
6. Characteristics
Table 5.
Characteristics
T
amb
= 25
C unless otherwise specified.
Symbol
V
BR
I
LR
V
F
C
line
C
line
r
dyn
Parameter
breakdown voltage
forward voltage
line capacitance
line capacitance
difference
dynamic resistance
Conditions
I
I
= 1 mA
I
I
= 1 mA
f = 1 MHz; V
I
= 1.5 V
f = 1 MHz; V
I
= 1.5 V
TLP
positive transient
negative transient
V
sbck
V
CL
snapback voltage
clamping voltage
I
I
= 1 A; TLP 100/10 ns
I
PP
= 5 A; positive transient
I
PP
=
5
A;
negative transient
[1]
[2]
[3]
This parameter is guaranteed by design.
According to IEC 61000-4-5 (8/20
s
current waveform).
100 ns Transmission Line Pulse (TLP); 50
;
pulser at 80 ns.
[2]
[2]
[1]
[1]
Min
5.5
-
-
-
-
Typ
9
<1
0.7
0.29
0.02
Max
-
100
-
0.34
0.05
Unit
V
nA
V
pF
pF
reverse leakage current per channel; V
I
= 5 V
[3]
-
-
-
-
-
0.27
0.27
1.5
3
3
-
-
-
-
-
V
V
V
PUSB3FR4
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 26 January 2015
3 of 15
NXP Semiconductors
PUSB3FR4
ESD protection for ultra high-speed interfaces
1
S21dd
(dB)
-1
aaa-016314
1.2
a
aaa-016315
0.8
pin 2 and 4
pin 1 and 5
-3
0.4
-5
10
6
10
7
10
8
10
9
f (Hz)
10
10
0.2
0
2
4
V
I
(V)
6
differential mode
C
line
a
=
---------------------------------
C
line
V
=
0
V
I
Fig 1.
Insertion loss; typical values
Fig 2.
Relative capacitance as a function of input
voltage; typical values
aaa-016317
0
S
dd21
(dB)
-20
aaa-016316
115
Z
dif
(Ω)
110
105
-40
100
(2)
-60
95
(1)
90
-80
85
-100
10
8
80
42.26
10
9
f (Hz)
10
10
42.36
42.46
42.56
42.66
42.76
t (ns)
Sdd21 normalized to 100
;
differential pairs CH1/CH2 versus CH3/CH4
t
r
= 200 ps; differential pair CH1 + CH2
(1) PUSB3FR4 on reference board
(2) Reference board without Device Under Test (DUT)
Fig 3.
Mixed-mode differential NEXT crosstalk;
typical values
Fig 4.
Differential Time Domain Reflectometer (TDR)
plot; typical values
PUSB3FR4
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 26 January 2015
4 of 15
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