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74LV241D

产品描述Buffers & Line Drivers OCTAL BUFFER 3-STATE
产品类别逻辑    逻辑   
文件大小95KB,共18页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
标准
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74LV241D概述

Buffers & Line Drivers OCTAL BUFFER 3-STATE

74LV241D规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称NXP(恩智浦)
零件包装代码SOIC
包装说明SOP, SOP20,.4
针数20
Reach Compliance Codeunknown
其他特性OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION
控制类型ENABLE LOW/HIGH
系列LV/LV-A/LVX/H
JESD-30 代码R-PDSO-G20
JESD-609代码e4
长度12.8 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大I(ol)0.008 A
湿度敏感等级1
位数4
功能数量2
端口数量2
端子数量20
最高工作温度125 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SOP
封装等效代码SOP20,.4
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Sup21 ns
传播延迟(tpd)36 ns
认证状态Not Qualified
座面最大高度2.65 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式GULL WING
端子节距1.27 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度7.5 mm

文档预览

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74LV241
Octal buffer/line driver; 3-state
Rev. 03 — 10 October 2005
Product data sheet
1. General description
The 74LV241 is a low-voltage, Si-gate CMOS device and is pin and function compatible
with 74HC241 and 74HCT241.
The 74LV241 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs (pins 1OE and 2OE).
2. Features
s
s
s
s
s
Optimized for low-voltage applications from 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V and T
amb
= 25
°C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V and T
amb
= 25
°C
ESD protection:
x
HBM EIA/JESD22-A114-C exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
2.5 ns.
Symbol
Parameter
Conditions
C
L
= 15 pF;
V
CC
= 3.3 V
V
CC
= 3.3 V;
V
I
= GND to V
CC
[1]
Min
-
-
-
Typ
8.0
3.5
30
Max
-
-
-
Unit
ns
pF
pF
t
PHL
, t
PLH
propagation delay
1An to 1Yn, 2An to 2Yn
C
i
C
PD
[1]
input capacitance
power dissipation
capacitance
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.

74LV241D相似产品对比

74LV241D 74LV241PW-T 74LV241DB 74LV241N 74LV241DB-T 74LV241PW 74LV241D-T
描述 Buffers & Line Drivers OCTAL BUFFER 3-STATE Buffers u0026 Line Drivers OCTAL BUFFER 3-STATE Buffers u0026 Line Drivers OCTAL BUFFER 3-STATE Buffers & Line Drivers OCTAL BUFFER 3-STATE Buffers & Line Drivers OCTAL BUFFER 3-STATE Buffers & Line Drivers OCTAL BUFFER 3-STATE Buffers & Line Drivers OCTAL BUFFER 3-STATE
是否Rohs认证 符合 符合 符合 符合 符合 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
零件包装代码 SOIC TSSOP SSOP DIP SSOP TSSOP SOIC
包装说明 SOP, SOP20,.4 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 SSOP, SSOP16,.3 DIP, DIP16,.3 SSOP, 4.40 MM, PLASTIC, MO-153, SOT-360-1, TSSOP-20 7.50 MM, PLASTIC, MS-013, SOT-163-1, SOP-20
针数 20 20 20 20 20 20 20
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown
其他特性 OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION
系列 LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 代码 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDIP-T20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e4 e4 e4 e4 e4 e4 e4
长度 12.8 mm 6.5 mm 7.2 mm 26.73 mm 7.2 mm 6.5 mm 12.8 mm
负载电容(CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
位数 4 4 4 4 4 4 4
功能数量 2 2 2 2 2 2 2
端口数量 2 2 2 2 2 2 2
端子数量 20 20 20 20 20 20 20
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP TSSOP SSOP DIP SSOP TSSOP SOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH IN-LINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
峰值回流温度(摄氏度) 260 260 260 NOT SPECIFIED 260 260 260
传播延迟(tpd) 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 2.65 mm 1.1 mm 2 mm 4.2 mm 2 mm 1.1 mm 2.65 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 1 V 1 V 1 V 1 V 1 V 1 V 1 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES NO YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
端子面层 Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
端子形式 GULL WING GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING GULL WING
端子节距 1.27 mm 0.65 mm 0.65 mm 2.54 mm 0.65 mm 0.65 mm 1.27 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL
处于峰值回流温度下的最长时间 30 30 30 NOT SPECIFIED 30 30 30
宽度 7.5 mm 4.4 mm 5.3 mm 7.62 mm 5.3 mm 4.4 mm 7.5 mm
是否无铅 不含铅 - 不含铅 不含铅 - 不含铅 -
控制类型 ENABLE LOW/HIGH - ENABLE LOW/HIGH ENABLE LOW/HIGH - ENABLE LOW/HIGH -
最大I(ol) 0.008 A - 0.008 A 0.008 A - 0.008 A -
湿度敏感等级 1 1 1 - 1 1 1
封装等效代码 SOP20,.4 - SSOP16,.3 DIP16,.3 - TSSOP16,.25 -
电源 3.3 V - 3.3 V 3.3 V - 3.3 V -
Prop。Delay @ Nom-Sup 21 ns - 21 ns 21 ns - 21 ns -
Source Url Status Check Date - 2013-06-14 00:00:00 - 2013-06-14 00:00:00 2013-06-14 00:00:00 - 2013-06-14 00:00:00

 
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