74HC166D
CMOS Digital Integrated Circuits Silicon Monolithic
74HC166D
1. Functional Description
•
8-Bit Shift Register (P-IN, S-OUT)
2. General
The 74HC166D is a high speed CMOS 8-BIT PARALLEL/SERIAL-IN, SERIAL-OUT SHIFT REGISTER
fabricated with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
It consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input and an overriding
clear input. The parallel-in or serial-in modes are controlled by the SHIFT/LOAD input. When the SHIFT/LOAD
input is held high, the serial data input is enabled and the eight flip-flops perform serial shifting on each clock
pulse. When held low, the parallel data inputs are enabled and synchronous loading occurs on the next clock
pulse. Clocking is accomplished on the low-to-high transition of the clock pulse. The CK-INH input should be
shifted high only while the CK input is held high. A direct clear input overrides all other inputs, including the
clock, and sets all the flip-flops to zero. Functional details are shown in the truth table and the timing charts.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
(2)
(3)
(4)
High speed: f
MAX
= 57 MHz (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 4.0
µA
(max) at T
a
= 25
Balanced propagation delays: t
PLH
≈
t
PHL
Wide operating voltage range: V
CC(opr)
= 2.0 V to 6.0 V
4. Packaging
SOIC16
Start of commercial production
©2016 Toshiba Corporation
1
2016-05
2016-08-04
Rev.3.0
74HC166D
10. System Diagram
11. Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
(Note 1)
Note
Rating
-0.5 to 7.0
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±20
±20
±25
±50
500
-65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: P
D
derates linearly with -8 mW/ above 85
©2016 Toshiba Corporation
4
2016-08-04
Rev.3.0
74HC166D
12. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall times
Symbol
V
CC
V
IN
V
OUT
T
opr
t
r
,t
f
Test Condition
Rating
2.0 to 6.0
0 to V
CC
0 to V
CC
-40 to 125
0 to 50
Unit
V
V
V
µs
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
©2016 Toshiba Corporation
5
2016-08-04
Rev.3.0
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