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The technical content of this austriamicrosystems datasheet is still valid.
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D ata she et
A S11 00
S e r ia ll y In t er f a c ed , 8 -D ig i t L E D D r iv e r
1 General Description
The AS1100 is an LED driver for 7 segment numeric displays of up to
8 digits. The AS1100 can be programmed via a conventional 4 wire
serial interface.
The device includes a BCD code-B decoder, a multiplex scan
circuitry, segment and display drivers, and a 64 Bit memory. The
memory is used to store the LED settings, so that continuous
reprogramming is not necessary.
Every individual segment can be addressed and updated separately.
Only one external resistor is required to set the current through the
LED display. Brightness can be controlled either in an analog or
digital way. The user can choose the internal code-B decoder to
display numeric digits or to address each segment directly.
The AS1100 features an extremely low shutdown current of only
20 A and an operational current of less than 500 A. The number of
visible digits can be programmed as well. The AS1100 can be reset
by software and an external clock can be used. Several test modes
support easy debugging.
The AS1100 is offered in a 24-pin SOIC package.
2 Key Features
10MHz Serial Interface
Decode/No-Decode Digit Selection
20 A Low-Power Shutdown (Data Retained)
Extremely low Operating Current 0.5mA in open loop
Digital and Analog Brightness Control
Display Blanked on Power-Up
Figure 1. AS1100 - Typical Application Diagram
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Drive Common-Cathode LED Display
Software Reset
Optional External clock
24-pin SOIC Package
3 Applications
The AS1100 is an ideal solution for Bar-Graph Displays, Industrial
Controllers, Panel Meters, LED Matrix Displays and White Goods
such as washing machines and dishwasher.
9.53k
+5V
19
VDD
18
ISET
DIFG0-DIG3
MOSI
P I/O
1 DIN
12 LOAD
1 CLK
9 GND
AS1100
SEG A-G
SEP DP
8 Digits
SCK
GND
4
8 Segments
8-Digit P Display
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Individual LED Segment Control
AS1100
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
DIN
1
24
DOUT
23
SEG D
21
SEG E
22
SEG DP
20
SEG C
19
VDD
18
I
SET
17
SEG G
16
SEG B
DIG0
2
DIG4
3
GND
DIG6
DIG2
4
5
6
AS1100
DIG3
7
DIG7
8
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
1
2, 3, 5:8, 10, 11
4, 9
12
13
14:17, 20:23
18
19
DIG 0 : DIG 7
GND
SEGA:G, DP
ISET
VDD
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GND
9
DIG5
10
DIG1
11
LOAD
12
15
SEG F
14
SEG A
13
CLK
Pin Name
DIN
LOAD/CS
CLK
DOUT
Description
Data input.
Data is programmed into the 16Bit shift register on the rising CLK edge
8 digit driver lines that sink the current from the common cathode of the display. In shutdown
mode the AS1100 switches the outputs to V
DD
.
Both GND pins must be connected.
Strobe input.
With the rising edge of the LOAD signal the 16 bit of serial data is latched into
the register.
Clock input.
The interface is capable to support clock frequencies up to 10MHz. The serial
data is clocked into the internal shift register with the rising edge of the CLK signal. On the
DOUT pin the data is applied with the falling edge of CLK.
Seven segment driver lines including the decimal point.
When a segment is turned off the
output is connected to GND.
The current into ISET determines the peak current through the segments and therefore the
brightness.
Positive Supply Voltage
(+5V)
Serial data output for cascading drivers.
The output is valid after 16.5 clock cycles. The
output is never set to high impedance.
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AS1100
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 2
may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in
Electrical Characteristics on page 4
is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Electrical Parameters
VDD to GND
All other pins to GND
Current
DIG 0:DIG 7 Sink Current
Latch-Up Immunity
Electrostatic Discharge
Digital outputs
All other pins
500
mA
SEG A : SEG G, SEG DP
100
mA
-0.3
-0.3
7
V
DD
+ 0.3
(max 7V)
V
V
Min
Max
Units
Notes
Continuous Power Dissipation (TA = +85°C)
Wide SOIC
Temperature Ranges and Storage Conditions
Storage Temperature Range
Package Body Temperature (Wide SOIC)
Humidity
Moisture Sensitive Level
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±200
500
mA
V
Norm: JEDEC 78
1000
V
Norm: MIL 883 E method 3015
941
mW
Derate 11.8mW/ºC
above +70ºC
-55
+150
ºC
+260
ºC
5
85
%
Non-condensing
3
Represents a max. floor life time of 168h
Revision 1.37
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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AS1100
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
V
DD
= 5V, R
SET
= 9.53kΩ±1%, T
A
= T
MIN
to T
MAX
(unless otherwise specified). All limits are guaranteed. The parameters with min and max
values are guaranteed with production tests or SQC (Statistical Quality Control) methods.
Table 3. Electrical Characteristics
Symbol
T
AMB
V
DD
I
DDSD
Parameter
Operating Temperature Range
Operating Supply Voltage
Shutdown Supply Current
All digital inputs at V
DD
or GND,
TA = +25ºC
R
SET
= open circuit
I
DD
f
OSC
I
DIGIT
I
SEG
∆I
SEG
I
DIGIT
I
SEG
Logic Inputs
I
IH
, I
IL
V
IH
V
IL
V
OH
V
OL
Operating Supply Current
Display Scan Rate
All segments and decimal point on,
I
SEG
= -40mA
8 digits scanned
V
OUT
= 0.65V
330
Conditions
Min
-40
4.0
5.0
20
Typ
Max
+85
5.5
50
Units
ºC
V
Digit Drive Sink Current
Segment Drive Source Current
Segment Drive Current Matching
Digit Drive Source Current
Segment Drive Sink Current
Input Current DIN, CLK, LOAD
Logic High Input Voltage
Logic Low Input Voltage
Output High Voltage
Output Low Voltage
Hysteresis Voltage
Timing Characteristics
t
CP
t
CH
t
CL
CLK Clock Period
CLK Pulse Width High
CLK Pulse Width Low
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CSH
t
DS
CLK Rise to LOAD Rise Hold Time
DIN Setup Time
DIN Hold Time
t
DH
t
DO
Output Data Propagation Delay
Te
t
LDCK
t
CSW
LOAD Rising Edge to Next Clock
Rising Edge
Minimum LOAD Pulse High
Data-to-Segment Delay
t
DSPD
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mA
Hz
500
800
1300
320
-30
mA
T
A
= +25ºC, V
OUT
= (V
DD
-1V)
-40
3.0
-45
mA
%
Digit off, V
DIGIT
= (V
DD
-0.3V)
Segment off, V
SEG
= 0.3V
-2
5
mA
mA
V
IN
= 0V or V
DD
-1
1
A
3.5
V
0.8
V
DOUT, I
SOURCE
= -1mA
DOUT, I
SINK
= 1.6mA
DIN, CLK, LOAD
V
DD
- 1
V
0.4
V
1
V
100
50
ns
ns
50
0
25
0
C
LOAD
= 50pF
50
50
2.25
25
ns
ns
ns
ns
ns
ns
ns
ms
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