End of Life. Last Available Purchase Date is 31-Dec-2014
Si9100
Vishay Siliconix
3-W High-Voltage Switchmode Regulator
FEATURES
10- to 70-V Input Range
Current-Mode Control
On-Chip 150-V, 5- MOSFET Switch
Reference Selection
Si9100 − 1%
High Efficiency Operation (> 80%)
Internal Start-Up Circuit
Internal Oscillator (1 MHz)
SHUTDOWN and RESET
DESCRIPTION
The Si9100 high-voltage switchmode regulators are
monolithic BiC/DMOS integrated circuits which contain most of
the components necessary to implement high-efficiency
dc-to-dc converters up to 3 watts. They can either be operated
from a low-voltage dc supply, or directly from a 10- to 70-V
unregulated dc power source. The Si9100 may be used with
an appropriate transformer to implement most single-ended
isolated power converter topologies (i.e., flyback and forward),
or by using a level shift circuit can generate a +5-V or a −5-V
non-isolated output from a −48-V source.
The Si9100 is available in both standard and lead (Pb)-free
14-pin plastic DIP and 20-pin PLCC packages which are
specified to operate over the industrial temperature range of
−40 C to 85 C.
FUNCTIONAL BLOCK DIAGRAM
FB
14 (20)
Error
Amplifier
V
REF
10 (14)
−
+
4 V (1%)
Ref
Gen
2V
−
+
+
−
1.2 V
BIAS
1 (2)
Current
Sources
To
Internal
Circuits
C/L
Comparator
Clock (
1
/
2 OSC
)
Current-Mode
Comparator
R
Q
S
3 (5)
DRAIN
−V
IN
(BODY)
COMP
13 (18)
DISCHARGE
9 (12)
OSC
IN
8 (11)
OSC
OUT
7 (10)
OSC
5 (8)
4 (7)
V
CC
11 (16)
12 (17)
SOURCE
V
CC
6 (9)
+V
IN
2 (3)
8.8 V
−
+
9.4 V
−
+
Undervoltage Comparator
Q
S
R
SHUTDOWN
RESET
Note: Figures in parenthesis represent pin numbers for 20-pin package.
Applications information, see AN702 and AN713.
Document Number: 70000
S-42041—Rev. G, 15-Nov-04
www.vishay.com
1
Si9100
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to
−V
IN
(V
CC
< +V
IN
+ 0.3 V)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 V
V
DS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 V
I
D
(Peak) (Note: 300
ms
pulse, 2% duty cycle) . . . . . . . . . . . . . . . . . . . . 2.5 A
I
D
(rms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mA
Logic Inputs (RESET,
SHUTDOWN, OSC IN) . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Linear Inputs (FEEDBACK, SOURCE) . . . . . . . . . . . . . . . . . . .
−0.3
V to 7 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 3 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 125_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 85_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)
a
14-Pin Plastic DIP (J Suffix)
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
20-Pin PLCC (N Suffix)
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1400 mW
Thermal Impedance (Q
JA
)
14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
20-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C
c. Derate 11.2 mW/_C above 25_C
RECOMMENDED OPERATING RANGE
Voltages Referenced to
−V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 V to 13.5 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 70 V
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 kW to 1 MW
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 7 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
SPECIFICATIONS
a
Test Conditions
UnlessOtherwise Specified
p
Parameter
Reference
Output Voltage
Output Impedance
e
Short Circuit Current
Temperature Stability
e
V
R
Z
OUT
I
SREF
T
REF
V
REF
=
−V
IN
OSC IN =
−
V
IN
(OSC Disabled), R
L
= 10 MW
Room
Room
Room
Full
3.92
15
70
4.0
30
100
0.5
4.08
45
130
1.0
V
kW
mA
mV/_C
Limits
Temp
b
Min
c
Typ
d
Max
c
Unit
Symbol
DISCHARGE =
−V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 390 kW , R
OSC
= 330 kW
Oscillator
Maximum Frequency
e
Initial Accuracy
Voltage Stability
Temperature Coefficient
e
f
MAX
f
OSC
Df/f
T
OSC
R
OSC
= 0
R
OSC
= 330 kW, See Note f
R
OSC
= 150 kW, See Note f
Df/f
= f(13.5 V)
−
f, (9.5 V)/f(9.5 V)
Room
Room
Room
Room
Full
1
80
160
3
100
200
10
200
120
240
15
500
MHz
kHz
%
ppm/_C
Error Amplifier
Feedback Input Voltage
Input BIAS Current
Input OFFSET Voltage
Open Loop Voltage Gain
e
Unity Gain Bandwidth
e
Dynamic Output Impedance
e
Output Current
Power Supply Rejection
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V
FB
I
FB
V
OS
A
VOL
BW
Z
OUT
I
OUT
PSRR
SOURCE (V
FB
= 3.4 V)
SINK (V
FB
= 4.5 V)
OSC IN =
−
V
IN
, (OSC Disabled)
OSC IN =
−
V
IN
, (OSC Disabled)
FB Tied to COMP
OSC In =
−V
IN
(OSC Disabled)
OSC IN =
−V
IN,
V
FB
= 4 V
Room
Room
Room
Room
Room
Room
Room
Room
Room
0.12
50
60
3.96
4.00
25
"15
80
1
1000
−2.0
0.15
70
2000
−1.4
4.04
500
"40
V
nA
mV
dB
MHz
W
mA
dB
2
Document Number: 70000
S-42041—Rev. G, 15-Nov-04
Si9100
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
UnlessOtherwise Specified
Parameter
Current Limit
Threshold Voltage
Delay to Output
e
V
SOURCE
t
d
R
L
= 100
W
from DRAIN to V
CC
V
FB
= 0 V
R
L
= 100
W
from DRAIN to V
CC
V
SOURCE
= 1.5 V, See Figure 1
Room
Room
1.0
1.2
100
1.4
200
V
ns
Limits
Temp
b
Min
c
Typ
d
Max
c
Unit
Symbol
DISCHARGE =
−V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 390 kW , R
OSC
= 330 kW
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
Pre-Regulator Start-Up Current
V
CC
Pre-Regulator
Turn-Off Threshold Voltage
Undervoltage Lockout
V
REG
−V
UVLO
+V
IN
+I
IN
I
START
V
REG
V
UVLO
V
DELTA
I
IN
= 10
mA
V
CC
w
10 V
Pulse Widthv300
ms
V
CC
= V
UVLO
I
PRE-REGULATOR
= 10
mA
R
L
= 100
W
from DRAIN to V
CC
See Detailed Description
Room
Room
Room
Room
Room
Room
8
7.8
7.0
0.3
15
9.4
8.8
0.6
9.7
9.2
V
70
10
V
mA
mA
Supply
Supply Current
Bias Current
I
CC
I
BIAS
Room
Room
0.45
10
0.6
15
1.0
20
mA
mA
Logic
SHUTDOWN Delay
e
SHUTDOWN Pulse Width
e
RESET Pulse Width
e
Latching Pulse Widthe
SHUTDOWN and RESET Low
Input Low Voltage
Input High Voltage
Input Current, Input Voltage High
Input Current, Input Voltage Low
t
SD
t
SW
t
RW
t
LW
V
IL
V
IH
I
IH
I
IL
V
IN
= 10 V
V
IN
= 0 V
See Figure 3
V
SOURCE
=
−V
IN
, See Figure 2
Room
Room
Room
Room
Room
Room
Room
Room
−35
8.0
1
−25
5
50
50
25
2.0
ns
50
100
V
mA
MOSFET Switch
Breakdown Voltage
Drain-Source On Resistance
g
Drain Off Leakage Current
Drain Capacitance
V
(BR)DSS
r
DS(on)
I
DSS
C
DS
V
SOURCE
= SHUTDOWN = 0 V
I
DRAIN
= 100
mA
V
SOURCE
= 0 V, I
DRAIN
= 100 mA
V
SOURCE
= SHUTDOWN = 0 V
V
DRAIN
= 100 V
V
SOURCE
= SHUTDOWN = 0 V
Full
Room
Room
Room
35
150
180
3
5
10
V
W
mA
pF
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f.
C
STRAY
Pin 8 =
v
5 pF
g. Temperature coefficient of r
DS(on)
is 0.75% per
_C,
typical.
Document Number: 70000
S-42041—Rev. G, 15-Nov-04
www.vishay.com
3
Si9100
Vishay Siliconix
TIMING WAVEFORMS
SOURCE
0
V
CC
DRAIN
0
−
1.5 V
−
50%
t
d
t
r
v
10 ns
V
CC
SHUTDOWN
0
V
CC
DRAIN
0
50%
−
−
t
SD
t
f
v
10 ns
10%
10%
FIGURE 1.
FIGURE 2.
V
CC
SHUTDOWN
0
V
CC
RESET
0
−
−
t
SW
50%
t
LW
50%
50%
t
RW
50%
50%
t
r
, t
f
v
10 ns
FIGURE 3.
TYPICAL CHARACTERISTICS
140
120
100
+V IN (V)
80
60
40
20
0
10
+V
IN
vs +I
IN
at Start-Up
V
CC
=
−V
IN
Output Switching Frequency
vs. Oscillator Resistance
1M
f OUT (Hz)
15
+I
IN
(mA)
20
100 k
10 k
10 k
100 k
r
OSC
−
Oscillator Resistance (W)
1M
FIGURE 4.
FIGURE 5.
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Document Number: 70000
S-42041—Rev. G, 15-Nov-04
Si9100
Vishay Siliconix
PIN CONFIGURATIONS
PDIP-14
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
PIN DESCRIPTION
Pin
Function
BIAS
+V
IN
DRAIN
SOURCE
−V
IN
V
CC
OSC OUT
OSC IN
DISCHARGE
14-Pin DIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20-Pin PLCC*
2
3
5
7
8
9
10
11
12
14
16
17
18
20
PLCC-20
3
2
1
20 19
4
5
6
7
8
9
10 11 12 13
Top View
18
17
16
15
14
V
REF
SHUTDOWN
RESET
COMP
FB
*Pins 1, 4, 6, 13, 15, and 19 = N/C
ORDERING INFORMATION
Standard
Part Number
Si9100DJ02
Si9100DN02
Lead (Pb)-Free
Part Number
Si9100DJ02—E3
Si9100DN02—E3
Temperature
Range
−40
to 85
_C
40
Package
PDIP-14
PLCC-20
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the Si9100
control circuitry, bias power can be supplied from the
unregulated input power source, from an external regulated
low-voltage supply, or from an auxiliary “bootstrap” winding on
the output inductor or transformer.
When power is first applied during start-up, +V
IN
will draw a
constant current. The magnitude of this current is determined
by a high-voltage depletion MOSFET device which is
connected between +V
IN
and V
CC
. This start-up circuitry
provides initial power to the IC by charging an external bypass
capacitance connected to the V
CC
pin. The constant current is
Document Number: 70000
S-42041—Rev. G, 15-Nov-04
disabled when V
CC
exceeds 9.4 V. If V
CC
is not forced to
exceed the 9.4-V threshold, then V
CC
will be regulated to a
nominal value of 9.4 V by the pre-regulator circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output MOSFET disabled until V
CC
exceeds the
undervoltage lockout threshold (typically 8.8 V). This
guarantees that the control logic will be functioning properly
and that sufficient gate drive voltage is available before the
MOSFET turns on. The design of the IC is such that the
undervoltage lockout threshold will not exceed the
pre-regulator turn-off voltage. Power dissipation can be
minimized by providing an external power source to V
CC
such
that the constant current source is always disabled.
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