74AUP1G06
SINGLE INVERTER WITH OPEN DRAIN OUTPUT
Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is
designed for low power and extended battery life in portable
applications.
The 74AUP1G06 is a single inverter with an open-drain output,
designed for operation over a power supply range of 0.8V to 3.6V.
The device is fully specified for partial power down applications using
I
OFF
. The I
OFF
circuitry disables the output, preventing damaging
current backflow when the device is powered down. The gate
performs the positive Boolean function:
Pin Assignments
Y
=
A
Features
•
•
•
•
•
•
Advanced Ultra Low Power (AUP) CMOS
Supply Voltage Range from 0.8V to 3.6V
±4mA Output Drive at 3.0V
Low Static Power Consumption
Icc < 0.9µA
Low Dynamic Power Consumption
C
PD
= 6pF (Typical at 3.6V)
Schmitt Trigger Action at all inputs makes the circuit tolerant for
slower input rise and fall time. The hysteresis is typically 250mV
at Vcc = 3.0V.
I
OFF
Supports Partial-Power-Down Mode Operation
ESD Protection Exceeds JESD 22
2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 100mA per JESD 78, Class I
Leadless Packages Named per JESD30E
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
•
•
•
•
•
•
Applications
•
•
Suited for Battery and Low Power Needs
Wide array of products such as:
Tablets, E-readers
Cell Phones, Personal Navigation / GPS
MP3 Players ,Cameras, Video Recorders
PCs, Ultrabooks, Notebooks, Netbooks,
Computer Peripherals, Hard Drives, SSDs, CD/DVD ROMs
TVs, DVDs, DVRs, Set-Top Boxes
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74AUP1G06
Document number: DS35148 Rev. 5 - 2
1 of 15
www.diodes.com
March 2015
© Diodes Incorporated
74AUP1G06
Absolute Maximum Ratings
(Notes 6 & 7) (@T
A
= +25°C, unless otherwise specified.)
Symbol
ESD HBM
ESD CDM
V
CC
V
I
V
o
I
IK
I
OK
I
O
I
CC
I
GND
T
J
T
STG
Notes:
Parameter
Human Body Model ESD Protection
Charged Device Model ESD Protection
Supply Voltage Range
Input Voltage Range
Voltage Applied to Output in High or Low State
Input Clamp Current V
I
< 0
Output Clamp Current (V
O
< 0 )
Continuous Output Current (V
O
= 0 to V
CC
)
Continuous Current Through V
CC
Continuous Current Through GND
Operating Junction Temperature
Storage Temperature
Rating
2
1
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
50
50
±20
50
-50
-40 to +150
-65 to +150
Unit
kV
kV
V
V
V
mA
mA
mA
mA
mA
°
C
°
C
6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device
operation should be within recommend values.
7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could
cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.
Recommended Operating Conditions
(Note 8) (@T
A
= +25°C, unless otherwise specified.)
Symbol
V
CC
V
I
V
O
Operating Voltage
Input Voltage
Output Voltage
V
CC
= 0.8V
V
CC
= 1.1V
I
OL
Low-Level Output Current
V
CC
= 1.4V
V
CC
= 1.65V
V
CC
= 2.3V
V
CC
= 3.0V
t/ V
T
A
Note:
Parameter
Min
0.8
0
0
—
—
—
—
—
—
—
-40
Max
3.6
3.6
3.6
20
1.1
1.7
1.9
3.1
4
200
125
Unit
V
V
V
µA
mA
Input Transition Rise or Fall Rate
Operating Free-Air Temperature
V
CC
= 0.8V to 3.6V
ns/V
°
C
8. Unused inputs should be held at V
CC
or Ground.
74AUP1G06
Document number: DS35148 Rev. 5 - 2
3 of 15
www.diodes.com
March 2015
© Diodes Incorporated
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
