74VHC14
Hex Schmitt Inverter
General Description
The VHC14 is an advanced high speed CMOS Hex
Schmitt Inverter fabricated with silicon gate CMOS technol-
ogy. It achieves the high speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS low
power dissipation. Pin configuration and function are the
same as the VHC04 but the inputs have hysteresis
between the positive-going and negative-going input
thresholds, which are capable of transforming slowly
changing input signals into sharply defined, jitter-free out-
put signals, thus providing greater noise margin than con-
ventional inverters.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
■
High Speed: t
PD
=
5.5 ns (typ) at V
CC
=
5V
■
Low power dissipation: I
CC
=
2
μA
(Max) at T
A
=
25°C
■
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(Min)
■
Power down protection is provided on all inputs
■
Low noise: V
OLP
=
0.8V (Max)
■
Pin and function compatible with 74HC14
Ordering Code:
Order Number
74VHC14M
(Note 1)
74VHC14MX_NL
(Note 2)
74VHC14SJ
(Note 1)
74VHC14MTC
(Note 1)
74VHC14MTC_NL
(Note 3)
74VHC14MTCX_NL
(Note 2)
74VHC14N
(Obsolete)
Package
Number
M14A
M14A
M14D
MTC14
MTC14
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pb-Free package per JEDEC J-STD-020B.
Note 1:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 2:
“_NL” indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.
Note 3:
“_NL” indicates Pb-Free product (per JEDEC J-STD-020B).
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Absolute Maximum Ratings
(Note 4)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Input Diode Current (I
IK
)
Output Diode Current (I
OK
)
DC Output Current (I
OUT
)
DC V
CC
/GND Current (I
CC
)
Storage Temperature (T
STG
)
Lead Temperature (T
L
)
Soldering (10 seconds)
260°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−0.5V
to V
CC
+
0.5V
−20
mA
±20
mA
±25
mA
±50
mA
−65°C
to
+150°C
Recommended Operating
Conditions
(Note 5)
Supply Voltage (V
CC
)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Operating Temperature (T
OPR
)
+2.0V
to
+5.5V
0V to
+5.5V
0V to V
CC
−40°C
to
+85°C
Note 4:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. The data book specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 5:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
P
Parameter
Positive Threshold Voltage
V
CC
3.0
4.5
5.5
V
N
Negative Threshold Voltage
3.0
4.5
5.5
V
H
Hysteresis Voltage
3.0
4.5
5.5
V
OH
HIGH Level Output Voltage
2.0
3.0
4.5
3.0
4.5
V
OL
LOW Level Output Voltage
2.0
3.0
4.5
3.0
4.5
I
IN
I
CC
Input Leakage Current
Quiescent Supply Current
0–5.5
5.5
0.90
1.35
1.65
0.30
0.40
0.50
1.9
2.9
4.4
2.58
3.94
0.0
0.0
0.0
0.1
0.1
0.1
0.36
0.36
±0.1
2.0
2.0
3.0
4.5
1.20
1.40
1.60
T
A
=
25°C
Min
Typ
Max
2.20
3.15
3.85
0.90
1.35
1.65
0.30
0.40
0.50
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±1.0
20.0
V
μA
μA
I
OL
=
4 mA
I
OL
=
8 mA
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
V
V
V
IN
=
V
IH
I
OL
=
50
μA
I
OH
= −4
mA
I
OH
= −8
mA
V
1.20
1.40
1.60
V
IN
=V
IL
I
OH
= −50 μA
V
V
T
A
= −40°C
to
+85°C
Min
Max
2.20
3.15
3.85
V
Units
Conditions
Noise Characteristics
Symbol
V
OLP
(Note 6)
V
OLV
(Note 6)
V
IHD
(Note 6)
V
ILD
(Note 6)
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
CC
5.0
5.0
5.0
5.0
T
A
=
25°C
Typ
0.4
−0.4
Limits
0.8
−0.8
3.5
1.5
Units
V
V
V
V
Conditions
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
C
L
=
50 pF
Note 6:
Parameter guaranteed by design.
3
www.fairchildsemi.com
Physical Dimensions
8 .7 5
8 .5 0
7 .6 2
14
8
A
0 .6 5
B
5 .6 0
6 .0 0
4 .0 0
3 .8 0
1 .7 0
C B A
P IN O N E
IN D IC A T O R
1
1 .2 7
(0 .3 3 )
0 .5 1
0 .3 5
0 .2 5
M
7
1 .2 7
L A N D P A T T E R N R E C O M M E N D A T IO N
1 .7 5 M A X
1 .5 0
1 .2 5
S E E D E T A IL A
0 .2 5
0 .1 0
C
0 .1 0 C
N O T E S : U N LE S S O T H E R W IS E S P E C IF IE D
0 .2 5
0 .1 9
R 0 .1 0
R 0 .1 0
8°
0°
0 .5 0
0 .2 5
A ) T H IS P A C K A G E C O N F O R M S T O JE D E C
M S -0 1 2 , V A R IA T IO N A B , IS S U E C ,
X 45°
B ) A L L D IM E N S IO N S A R E IN M ILLIM E T E R S .
C ) D IM E N S IO N S D O N O T IN C LU D E M O L D
G AG E PLANE
FLASH O R BU R R S.
D ) LA N D P A T T E R N S T A N D A R D :
S O IC 1 2 7 P 6 0 0 X 1 4 5 -1 4 M
0 .3 6
E ) D R A W IN G C O N F O R M S T O A S M E Y 14.5M -1994
F ) D R A W IN G F IL E N A M E : M 14A R E V 13
0 .9 0
0 .5 0
(1 .0 4 )
D E T A IL A
S C A L E : 2 0 :1
S E A T IN G P L A N E
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
5
www.fairchildsemi.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
