HIGH-SPEED
4K x 8 DUAL-PORT
STATIC SRAM
Features
◆
IDT7134SA/LA
LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018
High-speed access
– Military: 35/45/55/70ns (max.)
– Industrial: 25/55ns (max.)
– Commercial: 20/25/35/45/55/70ns (max.)
Low-power operation
– IDT7134SA
Active: 700mW (typ.)
Standby: 5mW (typ.)
– IDT7134LA
Active: 700mW (typ.)
Standby: 1mW (typ.)
◆
◆
◆
◆
◆
◆
◆
◆
Fully asynchronous operation from either port
Battery backup operation—2V data retention (LA only)
TTL-compatible; single 5V (±10%) power supply
Available in 48-pin DIP, LCC, Flatpack and 52-pin PLCC
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available for
selected speeds
Green parts available, see ordering information
Functional Block Diagram
R/W
L
CE
L
R/W
R
CE
R
OE
L
I/O
0L
- I/O
7L
I/O
CONTROL
I/O
CONTROL
OE
R
I/O
0R
- I/O
7R
A
0L
- A
11L
ADDRESS
DECODER
MEMORY
ARRAY
ADDRESS
DECODER
A
0R
- A
11R
2720 drw 01
JANUARY 2018
1
©2018 Integrated Device Technology, Inc.
DSC-2720/17
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
Description
The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM
designed to be used in systems where on-chip hardware port arbitration
is not needed. This part lends itself to those systems which cannot
tolerate wait states or are designed to be able to externally arbitrate or
withstand contention when both sides simultaneously access the
same Dual-Port RAM location.
The IDT7134 provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. It is the user’s responsibility
to ensure data integrity when simultaneously accessing the same
memory location from both ports. An automatic power down feature,
controlled by
CE,
permits the on-chip circuitry of each port to enter a very
low standby power mode.
Fabricated using CMOS high-performance technology, these Dual-
Ports typically operate on only 700mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each port
typically consuming 200µW from a 2V battery.
The IDT7134 is packaged on either a sidebraze or plastic 48-pin
DIP, 48-pin LCC, 52-pin PLCC and 48-pin Flatpack. Military grade
product is manufactured in compliance with MIL-PRF-38535 QML,
making it ideally suited to military temperature applications demanding the
highest level of performance and reliability.
R/W
L
CE
L
R/W
R
N/C
A
11R
INDEX
CE
L
R/W
L
A
11L
A
10L
OE
L
A
0L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I/O
3L
I/O
4L
I/O
5L
I/O
6L
I/O
7L
GND
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
IDT7134P or C
41
P48-1
(4)
9
40
&
39
10
(4)
11
C48-2
38
37
12
48-Pin
Top
13
View
(5)
36
14
35
15
34
33
16
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
V
CC
CE
R
R/W
R
A
11R
A
10R
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
I/O
6R
I/O
5R
I/O
4R
I/O
3R
I/O
2R
I/O
1R
I/O
0R
,
2720 drw 02
7 6 5 4 3
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I/O
3L
8
9
10
11
12
13
14
15
16
17
18
19
20
2
1
52 51 50 49 48 47
46
45
44
43
42
A
10R
A
10L
A
11L
A
0L
OE
L
V
CC
CE
R
N/C
Pin Configurations
(1,2,3)
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
N/C
I/O
7R
IDT7134J
J52-1
(4)
52-Pin
PLCC
41
40
39
38
37
36
Top View
(5)
35
34
21 22 23 24 25 26 27 28 29 30 31 32 33
I/O
4L
I/O
5L
N/C
GND
I/O
0R
I/O
1R
I/O
2R
I/O
4R
I/O
5R
I/O
3R
I/O
6R
I/O
6L
I/O
7L
2720 drw 03
A
11L
R/W
L
CE
L
R/W
R
INDEX
6 5 4 3 2
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
NOTES:
1. All V
CC
pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. P48-1 package body is approximately .55 in x 2.43 in x .18 in.
C48-2 package body is approximately .62 in x 2.43 in x .15 in.
J52-1 package body is approximately .75 in x .75 in x .17 in.
L48-1 package body is approximately .57 in x .57 in x .68 in.
F48-1 package body is approxiamtely .75 in x .75 in x .11 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of actual part-marking.
7
8
9
10
11
12
13
14
15
16
17
1
48 47 46 45 44 43
42
41
40
39
A
10R
OE
R
A
11R
V
CC
CE
R
A
10L
A
0L
OE
L
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
I/O
6R
,
IDT7134L48 or F
L48-1
(4)
&
F48-1
(4)
48-Pin LCC/Flatpack
Top View
(5)
38
37
36
35
34
33
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
32
31
18
19 20 21 22 23 24 25 26 27 28 29 30
I/O
4R
I/O
5R
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
I/O
3L
I/O
4L
I/O
6L
I/O
7L
I/O
5
L
2720 drw 04
2
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
Rating
Terminal Voltage
with Respect
to GND
Temperature
Under Bias
Storage
Temperature
Power
Dissipation
DC Output
Current
Commercial
& Industrial
-0.5 to +7.0
Military
-0.5 to +7.0
Unit
V
Recommended Operating
Temperature and Supply Voltage
(1,2)
Grade
Military
Ambient
Temperature
-55
O
C to +125
O
C
0
O
C to +70
O
C
-40
O
C to +85
O
C
GND
0V
0V
0V
Vcc
5.0V
+
10%
5.0V
+
10%
5.0V
+
10%
2720 tbl 03
T
BIAS
T
STG
P
T
(3)
I
OUT
-55 to +125
-65 to +150
1.5
50
-65 to +135
-65 to +150
1.5
50
o
C
C
Commercial
Industrial
o
W
mA
2720 tbl 01
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed Vcc + 10% for more than 25%of the cycle time or 10 ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc +10%.
3. V
TERM
= 5.5V.
Recommended DC Operating
Conditions
Symbol
V
CC
GND
V
IH
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
____
____
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
2720 tbl 04
Capacitance
Symbol
C
IN
C
OUT
(1)
V
IL
(T
A
= +25°C, f = 1.0MHz)
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
11
11
Unit
pF
pF
2720 tbl 02
Parameter
Input Capacitance
Output Capacitance
NOTES:
1. V
IL
(min.) > -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V and from 3V to 0V.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 5V ± 10%)
7134SA
Symbol
|I
LI
|
|I
LO
|
V
OL
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Test Conditions
V
CC
= 5.5V, V
IN
= 0V to V
CC
CE
- V
IH
, V
OUT
= 0V to V
CC
I
OL
= 6mA
I
OL
= 8mA
V
OH
Output High Voltage
I
OH
= -4mA
Min.
___
___
___
___
7134LA
Min.
___
___
___
___
Max.
10
10
0.4
0.5
___
Max.
5
5
0.4
0.5
___
Unit
µA
µA
V
V
V
2720 tbl 05
2.4
2.4
NOTES:
1. At Vcc < 2.0V input leakages are undefined.
3
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1,2)
(V
CC
= 5.0V ± 10%)
7134X20
Com'l Only
Symbol
I
CC
Parameter
Dynamic Operating
Current
(Both Ports Active)
CE
= V
IL
Outputs Disabled
f = f
MAX
(3)
Test Condition
Version
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
= V
IL
and
CE
"B"
= V
IH
Active Port Outputs Disabled,
f=f
MAX
(3)
COM'L
MIL &
IND
COM'L
MIL &
IND
COM'L
MIL &
IND
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
Typ.
170
170
____
____
7134X25
Com'l & Ind
Typ.
160
160
160
160
25
25
25
25
95
95
95
95
1.0
0.2
1.0
0.2
95
95
95
95
Max.
280
220
310
260
80
50
100
80
180
140
210
170
15
4.0
30
10
170
120
210
150
7134X35
Com'l
& Military
Typ.
150
150
150
150
25
25
25
25
85
85
85
85
1.0
0.2
1.0
0.2
85
85
85
85
Max.
260
210
300
250
75
45
75
55
170
130
200
160
15
4.0
30
10
160
110
190
130
2720 tbl 06a
Max.
280
240
____
____
Unit
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
and
CE
R
= V
IH
f = f
MAX
(3)
25
25
____
____
100
80
____
____
mA
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
105
105
____
____
180
150
____
____
mA
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports
CE
L
and
CE
R
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(3)
One Port
CE
"A"
or
CE
"B"
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled,
f = f
MAX
(3)
1.0
0.2
____
____
15
4.5
____
____
mA
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
105
105
____
____
170
130
____
____
mA
7134X45
Com'l &
Military
Symbol
I
CC
Parameter
Dynamic Operating
Current
(Both Ports Active)
CE
= V
IL
Outputs Disabled
f = f
MAX
(3)
Test Condition
Version
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
= V
IL
and
CE
"B"
= V
IH
Active Port Outputs Disabled,
f=f
MAX
(3)
COM'L
MIL &
IND
COM'L
MIL &
IND
COM'L
MIL &
IND
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
Typ.
140
140
140
140
25
25
25
25
75
75
75
75
1.0
0.2
1.0
0.2
75
75
75
75
Max.
240
200
280
240
70
40
70
50
160
130
190
150
15
4.0
30
10
150
100
180
120
7134X55
Com'l, Ind
& Military
Typ.
140
140
140
140
25
25
25
25
75
75
75
75
1.0
0.2
1.0
0.2
75
75
75
75
Max.
240
200
270
220
70
40
70
50
160
130
180
150
15
4.0
30
10
150
100
170
120
7134X70
Com'l &
Military
Typ.
140
140
140
140
25
25
25
25
75
75
75
75
1.0
0.2
1.0
0.2
75
75
75
75
Max.
240
200
270
220
70
40
70
50
160
130
180
150
15
4.0
30
10
150
100
170
120
2720 tbl 06b
Unit
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
and
CE
R
= V
IH
f = f
MAX
(3)
mA
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
mA
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports
CE
L
and
CE
R
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(3)
One Port
CE
"A"
or
CE
"B"
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled,
f = f
MAX
(3)
mA
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
mA
NOTES:
1. 'X' in part number indicates power rating (SA or LA).
2. V
CC
= 5V, T
A
= +25°C for typical, and parameters are not production tested.
3. f
MAX
= 1/t
RC
= All inputs cycling at f = 1/t
RC
(except Output Enable). f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby I
SB3.
4
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
Symbol
V
DR
I
CCDR
Parameter
V
CC
for Data Retention
Data Retention Current
V
CC
= 2V
CE
> V
HC
V
IN
> V
HC
or < V
LC
t
CDR
(3)
t
R
(3)
Chip Deselect to Data Retention Time
Operation Recovery Time
MIL. & IND.
COM'L.
Test Condition
Min.
2.0
___
___
Typ.
(1)
___
Max.
___
Unit
V
µA
100
100
___
___
4000
1500
___
___
0
t
RC
(2)
ns
ns
2720 tbl 07
NOTES:
1. V
CC
= 2V, T
A
= +25°C, and are not production tested.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but not production tested.
Data Retention Waveform
DATA RETENTION MODE
V
CC
4.5V
t
CDR
CE
V
IH
V
DR
V
DR
≥
2V
4.5V
t
R
V
IH
2720 drw 05
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
Figures 1 and 2
2720 tbl 08
+5V
1250Ω
DATA
OUT
775Ω
30pF
2720 drw 06
,
+5V
1250Ω
DATA
OUT
775Ω
5pF *
2720 drw 07
,
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig
5
stm32/stm8
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