19-3365; Rev 1; 4/09
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
General Description
The MAX1277/MAX1279 are low-power, high-speed, seri-
al-output, 12-bit, analog-to-digital converters (ADCs) with
an internal reference that operates at up to 1.5Msps.
These devices feature true-differential inputs, offering bet-
ter noise immunity, distortion improvements, and a wider
dynamic range over single-ended inputs. A standard
SPI™/QSPI™/MICROWIRE™ interface provides the clock
necessary for conversion. These devices easily interface
with standard digital signal processor (DSP) synchronous
serial interfaces.
The MAX1277/MAX1279 operate from a single +2.7V to
+3.6V supply voltage. The MAX1277/MAX1279 include a
2.048V internal reference. The MAX1277 has a unipolar
analog input, while the MAX1279 has a bipolar analog
input. These devices feature a partial power-down mode
and a full power-down mode for use between conver-
sions, which lower the supply current to 2mA (typ) and
1µA (max), respectively. Also featured is a separate
power-supply input (V
L
), which allows direct interfacing to
+1.8V to V
DD
digital logic. The fast conversion speed,
low-power dissipation, excellent AC performance, and DC
accuracy (±1 LSB INL) make the MAX1277/MAX1279
ideal for industrial process control, motor control, and
base-station applications.
The MAX1277/MAX1279 come in a 12-pin TQFN pack-
age, and are available in the extended (-40°C to +85°C)
temperature range.
o
1.5Msps Sampling Rate
o
Only 22mW (typ) Power Dissipation
o
Only 1µA (max) Shutdown Current
o
High-Speed, SPI-Compatible, 3-Wire Serial Interface
o
68.5dB S/(N + D) at 525kHz Input Frequency
o
Internal True-Differential Track/Hold (T/H)
o
Internal 2.048V Reference
o
No Pipeline Delays
o
Small 12-Pin TQFN Package
Features
MAX1277/MAX1279
Ordering Information
PART
MAX1277AETC-T
MAX1277BETC-T
MAX1279AETC-T
MAX1279BETC-T
TEMP RANGE
PIN-
PACKAGE
INPUT
Unipolar
Unipolar
Bipolar
Bipolar
-40°C to +85°C 12 TQFN
-40°C to +85°C 12 TQFN
-40°C to +85°C 12 TQFN
-40°C to +85°C 12 TQFN
Applications
Data Acquisition
Bill Validation
Motor Control
Communications
Portable Instruments
Typical Operating Circuit
Pin Configuration
+2.7V TO +3.6V
+1.8V TO V
DD
AIN+
12
N.C.
11
SCLK
10
TOP VIEW
10μF
0.01μF
V
DD
0.01μF
V
L
DOUT
10μF
AIN-
REF
RGND
1
2
3
9
8
7
CNVST
DOUT
V
L
MAX1277
MAX1279
DIFFERENTIAL +
INPUT
VOLTAGE -
AIN+
AIN-
MAX1277
MAX1279
REF
4.7μF
0.01μF
RGND
μC/DSP
CNVST
SCLK
4
V
DD
5
N.C.
6
GND
GND
TQFN
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
MAX1277/MAX1279
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND ..............................................................-0.3V to +6V
V
L
to GND ................-0.3V to the lower of (V
DD
+ 0.3V) and +6V
Digital Inputs
to GND .................-0.3V to the lower of (V
DD
+ 0.3V) and +6V
Digital Output
to GND ....................-0.3V to the lower of (V
L
+ 0.3V) and +6V
Analog Inputs and
REF to GND..........-0.3V to the lower of (V
DD
+ 0.3V) and +6V
RGND to GND .......................................................-0.3V to +0.3V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (T
A
= +70°C)
12-Pin TQFN (derate 16.9mW/°C above +70°C) ......1349mW
Operating Temperature Range
MAX127_ _ ETC ..............................................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +2.7V to +3.6V, V
L
= V
DD
, f
SCLK
= 24MHz, 50% duty cycle, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C.)
PARAMETER
DC ACCURACY
Resolution
Relative Accuracy (Note 1)
Differential Nonlinearity (Note 2)
Offset Error
Offset-Error Temperature
Coefficient
Gain Error
Gain Temperature Coefficient
DYNAMIC SPECIFICATIONS (f
IN
= 525kHz sine wave, V
IN
= V
REF
, unless otherwise noted.)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Intermodulation Distortion
Full-Power Bandwidth
Full-Linear Bandwidth
CONVERSION RATE
Minimum Conversion Time
Maximum Throughput Rate
Minimum Throughput Rate
Track-and-Hold Acquisition Time
Aperture Delay
Aperture Jitter
External Clock Frequency
f
SCLK
(Note 6)
(Note 7)
t
ACQ
(Note 4)
(Note 5)
t
CONV
(Note 3)
1.5
10
125
5
30
24
0.667
µs
Msps
ksps
ns
ns
ps
MHz
SINAD
THD
SFDR
IMD
f
IN1
= 250kHz, f
IN2
= 300kHz
-3dB point, small-signal method
S/(N + D) > 68dB, single ended
Up to the 5th harmonic
66
68.5
-80
-83
-78
15
1.2
-76
-76
dB
dB
dB
dB
MHz
MHz
Offset nulled
±2
±1
±6.0
INL
DNL
MAX127_A
MAX127_B
MAX127_A
MAX127_B
12
-1.0
-1.5
-1.0
-1.0
+1.0
+1.5
+1.0
+1.5
±8.0
Bits
LSB
LSB
LSB
ppm/°C
LSB
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +3.6V, V
L
= V
DD
, f
SCLK
= 24MHz, 50% duty cycle, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C.)
PARAMETER
ANALOG INPUTS (AIN+, AIN-)
Differential Input Voltage Range
Absolute Input Voltage Range
DC Leakage Current
Input Capacitance
Input Current (Average)
REFERENCE OUTPUT (REF)
REF Output Voltage Range
Voltage Temperature Coefficient
Load Regulation
Line Regulation
DIGITAL INPUTS (SCLK, CNVST)
Input Voltage Low
Input Voltage High
Input Leakage Current
DIGITAL OUTPUT (DOUT)
Output Load Capacitance
Output Voltage Low
Output Voltage High
Output Leakage Current
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
Analog Supply Current,
Normal Mode
Analog Supply Current,
Partial Power-Down Mode
Analog Supply Current,
Full Power-Down Mode
V
DD
V
L
Static, f
SCLK
= 24MHz
I
DD
Static, no SCLK
Operational, 1.5Msps
I
DD
I
DD
f
SCLK
= 24MHz
No SCLK
f
SCLK
= 24MHz
No SCLK
Operational, full-scale input at 1.5Msps
Static, f
SCLK
= 24MHz
Digital Supply Current (Note 8)
Partial/full power-down mode,
f
SCLK
= 24MHz
Static, no SCLK, all modes
Positive-Supply Rejection
PSR
V
DD
= 3V +20% -10%, full-scale input
2.7
1.8
6
5
7
2
2
1
0.3
0.3
0.15
0.1
0.1
±0.2
1
1
0.5
0.3
1
±3.0
µA
mV
mA
3.6
V
DD
8
7
9
mA
µA
mA
V
V
C
OUT
V
OL
V
OH
I
OL
For stated timing performance
I
SINK
= 5mA, V
L
≥
1.8V
I
SOURCE
= 1mA, V
L
≤
1.8V
Output high impedance
V
L
- 0.5V
±0.2
±10
30
0.4
pF
V
V
µA
VIL
VIH
I
IL
0.7 x V
L
0.05
±10
0.3 x V
L
V
V
µA
I
SOURCE
= 0 to 2mA
I
SINK
= 0 to 100µA
V
DD
= 2.7V to 3.6V, static
Static, T
A
= +25°C
2.038
2.048
±50
0.35
1.0
0.25
2.058
V
ppm/°C
mV/mA
mV/V
Per input pin
Time averaged at maximum throughput rate
16
75
V
IN
AIN+ - AIN-, MAX1277
AIN+ - AIN-, MAX1279
0
-V
REF
/ 2
0
V
REF
+V
REF
/ 2
V
DD
±1
V
V
µA
pF
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX1277/MAX1279
_______________________________________________________________________________________
3
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
MAX1277/MAX1279
TIMING CHARACTERISTICS
(V
DD
= +2.7V to +3.6V, V
L
= V
DD
, f
SCLK
= 24MHz, 50% duty cycle, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are
at T
A
= +25°C.)
PARAMETER
SCLK Pulse-Width High
SYMBOL
t
CH
CONDITIONS
V
L
= 2.7V to V
DD
V
L
= 1.8V to V
DD
, minimum recommended
(Note 7)
V
L
= 2.7V to V
DD
SCLK Pulse-Width Low
t
CL
V
L
= 1.8V to V
DD
, minimum recommended
(Note 7)
C
L
= 30pF, V
L
= 2.7V to V
DD
C
L
= 30pF, V
L
= 1.8V to V
DD
V
L
= 1.8V to V
DD
V
L
= 1.8V to V
DD
V
L
= 1.8V to V
DD
4
10
20
2
16
18.7
22.5
17
24
ns
MIN
18.7
22.5
ns
TYP
MAX
UNITS
SCLK Rise to DOUT Transition
DOUT Remains Valid After SCLK
CNVST Fall to SCLK Fall
CNVST Pulse Width
Power-Up Time; Full Power-Down
Restart Time; Partial Power-Down
t
DOUT
t
DHOLD
t
SETUP
t
CSW
t
PWR-UP
t
RCV
ns
ns
ns
ns
ms
Cycles
Note 1:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset
error have been nulled.
Note 2:
No missing codes over temperature.
Note 3:
Conversion time is defined as the number of clock cycles (16) multiplied by the clock period.
Note 4:
At sample rates below 10ksps, the input full-linear bandwidth is reduced to 5kHz.
Note 5:
The listed value of three SCLK cycles is given for full-speed continuous conversions. Acquisition time begins on the 14th ris-
ing edge of SCLK and terminates on the next falling edge of CNVST. The IC idles in acquisition mode between conversions.
Note 6:
Undersampling at the maximum signal bandwidth requires the minimum jitter spec for SINAD performance.
Note 7:
1.5Msps operation guaranteed for V
L
> 2.7V. See the
Typical Operating Characteristics
section for recommended sampling
speeds for V
L
< 2.7V.
Note 8:
Digital supply current is measured with the V
IH
level equal to V
L
, and the V
IL
level equal to GND.
V
L
CNVST
t
CSW
t
SETUP
SCLK
t
CL
t
CH
DOUT
DOUT
6kΩ
DOUT
t
DHOLD
t
DOUT
6kΩ
GND
a) HIGH-Z TO V
OH
, V
OL
TO V
OH
,
AND V
OH
TO HIGH-Z
C
L
C
L
GND
b) HIGH-Z TO V
OL
, V
OH
TO V
OL
,
AND V
OL
TO HIGH-Z
Figure 1. Detailed Serial-Interface Timing
Figure 2. Load Circuits for Enable/Disable Times
4
_______________________________________________________________________________________
1.5Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
Typical Operating Characteristics
(V
DD
= +3V, V
L
= V
DD
, f
SCLK
= 24MHz, f
SAMPLE
= 1.5Msps, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are mea-
sured at T
A
= +25°C.)
MAXIMUM RECOMMENDED f
SCLK
vs. V
L
MAX1277/79 toc01
MAX1277/MAX1279
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE (MAX1277)
MAX1277/79 toc02
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE (MAX1279)
0.75
0.50
INL (LSB)
0.25
0
-0.25
-0.50
-0.75
MAX1277/79 toc03
25
1.00
0.75
0.50
INL (LSB)
0.25
0
-0.25
1.00
23
f
SCLK
(MHz)
21
19
-0.50
-0.75
17
1.8
2.1
2.4
2.7
V
L
(V)
3.0
3.3
3.6
-1.00
0
1024
2048
3072
4096
DIGITAL OUTPUT CODE
-1.00
-2048
-1024
0
1024
2048
DIGITAL OUTPUT CODE
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE (MAX1277)
MAX1277/79 toc04
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE (MAX1279)
MAX1277/79 toc05
OFFSET ERROR
vs. TEMPERATURE (MAX1277)
MAX1277/79 toc06
1.00
0.75
0.50
DNL (LSB)
0.25
0
-0.25
-0.50
-0.75
-1.00
0
1024
2048
3072
1.00
0.75
0.50
DNL (LSB)
0.25
0
-0.25
-0.50
-0.75
0
-1
OFFSET ERROR (LSB)
-2
-3
-4
-5
-6
4096
-1.00
-2048
-1024
0
1024
2048
-40
-15
10
35
60
85
DIGITAL OUTPUT CODE
DIGITAL OUTPUT CODE
TEMPERATURE (°C)
OFFSET ERROR
vs. TEMPERATURE (MAX1279)
MAX1277/79 toc07
GAIN ERROR
vs. TEMPERATURE (MAX1277)
MAX1277/79 toc08
GAIN ERROR
vs. TEMPERATURE (MAX1279)
MAX1277/79 toc09
0
-1
OFFSET ERROR (LSB)
-2
-3
-4
-5
-6
-40
-15
10
35
60
4
3
GAIN ERROR (LSB)
2
1
0
-1
-2
2
1
GAIN ERROR (LSB)
0
-1
-2
-3
-4
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
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