电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74ALVT16240DG

产品描述Buffers & Line Drivers 2.5/3.3V 16-BIT BUFFER INV 3-S
产品类别半导体    逻辑   
文件大小84KB,共17页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
标准
下载文档 详细参数 全文预览

74ALVT16240DG在线购买

供应商 器件名称 价格 最低购买 库存  
74ALVT16240DG - - 点击查看 点击购买

74ALVT16240DG概述

Buffers & Line Drivers 2.5/3.3V 16-BIT BUFFER INV 3-S

74ALVT16240DG规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
NXP(恩智浦)
产品种类
Product Category
Buffers & Line Drivers
RoHSDetails
Number of Input Lines16 Input
Number of Output Lines16 Output
PolarityInverting
电源电压-最大
Supply Voltage - Max
3.6 V
电源电压-最小
Supply Voltage - Min
2.3 V
最小工作温度
Minimum Operating Temperature
- 40 C
最大工作温度
Maximum Operating Temperature
+ 85 C
安装风格
Mounting Style
SMD/SMT
封装 / 箱体
Package / Case
TSSOP-48
输出类型
Output Type
3-State
Logic FamilyALVT
Logic TypeBiCMOS
Number of Channels16
High Level Output Current- 32 mA
Low Level Output Current64 mA
工作电源电压
Operating Supply Voltage
2.5 V, 3.3 V
传播延迟时间
Propagation Delay Time
3.7 ns at 2.5 V, 3 ns at 3.3 V
工厂包装数量
Factory Pack Quantity
39
单位重量
Unit Weight
0.000212 oz

文档预览

下载PDF文档
74ALVT16240
16-bit inverting buffer/driver; 3-state
Rev. 03 — 4 July 2005
Product data sheet
1. General description
The 74ALVT16240 is a high-performance BiCMOS device designed for V
CC
operation at
2.5 V or 3.3 V with I/O compatibility up to 5 V.
The 74ALVT16240 is an inverting 16-bit buffer that is ideal for driving bus lines. The device
features four output enable inputs (1OE, 2OE, 3OE, 4OE), each controlling four of the
3-state outputs.
2. Features
s
s
s
s
s
s
s
5 V I/O compatible
Live insertion and extraction permitted
3-state buffers
Power-up 3-state
Output capability: +64 mA and
−32
mA
Latch-up protection:
x
JESD 78 exceeds 500 mA
Electrostatic discharge protection:
x
MIL STD 883 method 3015: exceeds 2000 V
x
Machine model: exceeds 200 V
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
16-bit bus interface
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
No bus current loading when output is tied to 5 V bus
s
s
s
s
s
3. Quick reference data
Table 1:
Quick reference data
T
amb
= 25
°
C.
Symbol Parameter
t
PLH
t
PHL
C
i
Conditions
Min
1.0
0.5
1.0
0.5
-
Typ
2.5
1.7
1.9
1.7
3
Max
3.7
3.0
2.9
2.6
-
Unit
ns
ns
ns
ns
pF
propagation delay nAx C
L
= 50 pF; V
CC
= 2.5 V
to nYx
C
L
= 50 pF; V
CC
= 3.3 V
propagation delay nAx C
L
= 50 pF; V
CC
= 2.5 V
to nYx
C
L
= 50 pF; V
CC
= 3.3 V
input capacitance on
nOE
V
I
= 0 V or V
CC

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 144  2637  2856  2533  1333  3  54  58  51  27 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved