电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74VHCT08AB

产品描述Logic Gates Quad 2-Input AND
产品类别半导体    逻辑   
文件大小150KB,共11页
制造商ST(意法半导体)
官网地址http://www.st.com/
下载文档 详细参数 全文预览

74VHCT08AB在线购买

供应商 器件名称 价格 最低购买 库存  
74VHCT08AB - - 点击查看 点击购买

74VHCT08AB概述

Logic Gates Quad 2-Input AND

74VHCT08AB规格参数

参数名称属性值
Product AttributeAttribute Value
制造商
Manufacturer
ST(意法半导体)
产品种类
Product Category
Logic Gates
RoHSN
产品
Product
Single-Function Gate
Logic FunctionAND
Logic Family74VHC
Number of Gates4 Gate
Number of Input Lines8 Input
Number of Output Lines4 Output
传播延迟时间
Propagation Delay Time
5.5 ns
电源电压-最大
Supply Voltage - Max
5.5 V
电源电压-最小
Supply Voltage - Min
4.5 V
最小工作温度
Minimum Operating Temperature
- 55 C
最大工作温度
Maximum Operating Temperature
+ 125 C
安装风格
Mounting Style
Through Hole
封装 / 箱体
Package / Case
PDIP-14
系列
Packaging
Tube
FunctionGate
工作温度范围
Operating Temperature Range
- 55 C to + 125 C
Output Current25 mA
Logic Type2-Input AND
工作电源电压
Operating Supply Voltage
4.5 V to 5.5 V
工厂包装数量
Factory Pack Quantity
25
单位重量
Unit Weight
0.057144 oz

文档预览

下载PDF文档
74VHCT08A
QUAD 2-INPUT AND GATE
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.7 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
µA
(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
OLP
= 0.8V (MAX.)
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74VHCT08AMTR
74VHCT08ATTR
DESCRIPTION
The 74VHCT08A is an advanced high-speed
CMOS QUAD 2-INPUT AND GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
December 2004
Rev. 4
1/11

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1627  857  939  2661  2368  34  24  13  21  8 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved