SiHB30N60E
www.vishay.com
Vishay Siliconix
E Series Power MOSFET
D
FEATURES
•
•
•
•
•
•
Low figure-of-merit (FOM) R
on
x Q
g
Low input capacitance (C
iss
)
Reduced switching and conduction losses
Ultra low gate charge (Q
g
)
Avalanche energy rated (UIS)
Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
D
2
PAK (TO-263)
G
G D
S
S
N-Channel MOSFET
APPLICATIONS
•
•
•
•
Server and telecom power supplies
Switch mode power supplies (SMPS)
Power factor correction power supplies (PFC)
Lighting
- High-intensity discharge (HID)
- Fluorescent ballast lighting
- LED lighting
• Industrial
- Welding
- Induction heating
- Motor drives
• Battery chargers
• Renewable energy
- Solar (PV inverters)
PRODUCT SUMMARY
V
DS
(V) at T
J
max.
R
DS(on)
max. (Ω) at 25 °C
Q
g
max. (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
130
15
39
Single
650
0.125
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
D
2
PAK (TO-263)
SiHB30N60E-GE3
SiHB30N60ET1-GE3
SiHB30N60ET5-GE3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-source voltage
Gate-source voltage
Continuous drain current (T
J
= 150 °C)
Pulsed drain
current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
P
D
T
J
, T
stg
V
DS
= 0 V to 80 % V
DS
for 10 s
dV/dt
LIMIT
600
± 30
29
18
76
2
690
250
-55 to +150
70
18
300
W/°C
mJ
W
°C
V/ns
°C
A
UNIT
V
Linear derating factor
Single pulse avalanche energy
b
Maximum power dissipation
Operating junction and storage temperature range
Drain-source voltage slope
Reverse diode dV/dt
d
Soldering recommendations (peak temperature)
c
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 28.2 mH, R
g
= 25
Ω,
I
AS
= 7 A
c. 1.6 mm from case
d. I
SD
≤
I
D
, dI/dt = 100 A/μs, starting T
J
= 25 °C
S17-0965-Rev. H, 26-Jun-17
Document Number: 91453
1
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB30N60E
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum junction-to-ambient
Maximum junction-to-case (drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
62
0.5
UNIT
°C/W
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-source breakdown voltage
V
DS
temperature coefficient
Gate-source threshold voltage (N)
Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance
Forward transconductance
Dynamic
Input capacitance
Output capacitance
Reverse transfer capacitance
Effective output capacitance, energy
related
a
Effective output capacitance, time
related
b
Total gate charge
Gate-source charge
Gate-drain charge
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate input resistance
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
Pulsed diode forward current
Diode forward voltage
Body diode reverse recovery time
Body diode reverse recovery charge
Reverse recovery current
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
o(er)
TEST CONDITIONS
V
GS
= 0 V, I
D
= 250 μA
Reference to 25 °C, I
D
= 250 μA
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 20 V
V
GS
= ± 30 V
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 600 V, V
GS
= 0 V, T
J
= 150 °C
V
GS
= 10 V
I
D
= 15 A
V
DS
= 8 V, I
D
= 3 A
MIN.
600
-
2
-
-
-
-
-
-
-
-
-
-
TYP.
-
0.64
2.8
-
-
-
-
0.104
5.4
2600
138
3
98
346
85
15
39
19
32
63
36
0.63
MAX.
-
-
4
± 100
±1
1
100
0.125
-
-
-
-
UNIT
V
V/°C
V
nA
μA
μA
Ω
S
V
GS
= 0 V,
V
DS
= 100 V,
f = 1 MHz
pF
-
-
130
-
-
40
65
95
75
-
Ω
ns
nC
V
DS
= 0 V to 480 V, V
GS
= 0 V
C
o(tr)
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
R
g
f = 1 MHz, open drain
V
DD
= 380 V, I
D
= 15 A,
V
GS
= 10 V, R
g
= 4.7
Ω
V
GS
= 10 V
I
D
= 15 A, V
DS
= 480 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
402
7
32
29
A
65
1.3
605
15
65
V
ns
μC
A
G
S
T
J
= 25 °C, I
S
= 15 A, V
GS
= 0 V
T
J
= 25 °C, I
F
= I
S
= 15 A,
dI/dt = 100 A/μs, V
R
= 20 V
Notes
a. C
oss(er)
is a fixed capacitance that gives the same energy as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
b. C
oss(tr)
is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 % to 80 % V
DSS
S17-0965-Rev. H, 26-Jun-17
Document Number: 91453
2
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB30N60E
www.vishay.com
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
80
70
60
I
D
- Drain Current (A)
50
40
30
20
10
0
0
5
10
15
20
25
30
V
DS
- Drain-to-Source Voltage (V)
5V
T
J
= 25 °C
15 V
14 V
13 V
12 V
11 V
10 V
9.0 V
8.0 V
7.0 V
6.0 V
BOTTOM 5.0 V
TOP
Vishay Siliconix
3.0
I
D
= 15 A
V
GS
= 10 V
2.0
2.5
R
DS(on)
- On-Resistance
(Normalized)
1.5
1.0
0.5
0.0
- 60 - 40 - 20
0
20
40
60
80 100 120 140 160
T
J
- Junction Temperature (°C)
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
50
Fig. 4 - Normalized On-Resistance vs. Temperature
10 000
C
iss
40
I
D
- Drain Current (A)
TOP
30
20
15 V
14 V
13 V
12 V
11 V
10 V
9.0 V
8.0 V
7.0 V
6.0 V
BOTTOM 5.0 V
C - Capacitance (pF)
1000
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
x C
ds
shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
C
oss
100
10
10
T
J
= 150 °C
C
rss
1
25
30
0
0
5
10
15
20
V
DS
- Drain-to-Source Voltage (V)
0
100
200
300
400
500
600
V
DS
- Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
80
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
18
16
60
I
D
, Drain Current (A)
T
J
= 25 °C
2000
14
12
C
oss
(pF)
40
T
J
= 150 °C
C
oss
10
E
oss
8
200
6
4
2
20
0
0
5
10
15
20
25
V
GS
, Gate-to-Source Voltage (V)
20
0
100
200
300
V
DS
400
500
600
0
Fig. 3 - Typical Transfer Characteristics
S17-0965-Rev. H, 26-Jun-17
Fig. 6 - C
oss
and E
oss
vs. V
DS
Document Number: 91453
3
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
E
oss
(μJ)
SiHB30N60E
www.vishay.com
Vishay Siliconix
30.0
24
I
D
= 15 A
V
GS
-
Gate-to-Source
Voltage (V)
20
V
DS
= 120 V
16
V
DS
= 480 V
I
D
, Drain Current (A)
V
DS
= 300 V
25.0
20.0
12
15.0
8
10.0
4
5.0
0
0
25
50
75
100
125
150
Q
g
- Total
Gate
Charge (nC)
0
25
50
75
100
125
150
T
C
- Temperature (°C)
Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage
1000
Fig. 10 - Maximum Drain Current vs. Case Temperature
725
700
675
650
625
600
575
550
- 60 - 40 - 20
T
J
= 150
°C
10
T
J
= 25 °C
1
0.1
0.01
0.001
0.0
V
DS
, Drain-to-Source Breakdown
Voltage (V)
100
I
S
-
Source
Current (A)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
20
40
60
80 100 120 140 160
V
SD
-
Source-to-Drain
Voltage (V)
T
J
- Temperature (°C)
Fig. 8 - Typical Source-Drain Diode Forward Voltage
Operation in this Area
Limited by R
DS(on)
Fig. 11 - Temperature vs. Drain-to-Source Voltage
100
I
DM
Limited
10
I
D
, Drain Current (A)
Limited by R
DS(on)
*
1
100 μs
1 ms
10 ms
0.1
T
C
= 25
°C
T
J
= 150 °C
Single
Pulse
1
BVDSS Limited
0.01
10
100
1000
V
DS
, Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is
specified
Fig. 9 - Maximum Safe Operating Area
S17-0965-Rev. H, 26-Jun-17
Document Number: 91453
4
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiHB30N60E
www.vishay.com
1
Vishay Siliconix
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single
Pulse
0.01
0.0001
0.001
0.01
Square
Wave Pulse Duration (s)
0.1
1
Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case
V
DS
V
GS
R
G
R
D
V
DS
t
p
V
DD
+
-
V
DD
D.U.T.
V
DS
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
I
AS
Fig. 16 - Unclamped Inductive Waveforms
Fig. 13 - Switching Time Test Circuit
V
DS
90 %
10 V
Q
GS
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GD
V
G
Fig. 14 - Switching Time Waveforms
Charge
Fig. 17 - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
L
Vary t
p
to obtain
required I
AS
R
G
V
DS
D.U.T
I
AS
+
-
V
DD
12 V
50 kΩ
0.2 µF
0.3 µF
10 V
t
p
0.01
Ω
V
GS
3 mA
+
D.U.T.
-
V
DS
Fig. 15 - Unclamped Inductive Test Circuit
I
G
I
D
Current sampling resistors
Fig. 18 - Gate Charge Test Circuit
S17-0965-Rev. H, 26-Jun-17
Document Number: 91453
5
For technical questions, contact:
hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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