19-3563; Rev 1; 5/05
12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
MAX5331/MAX5332/MAX5333
General Description
The MAX5331/MAX5332/MAX5333 are 12-bit digital-to-
analog converters (DACs) with 32 sample-and-hold
(SHA) outputs for applications where a high number of
programmable voltages are required. These devices
include a clock oscillator and a sequencer that updates
the DAC with codes from an internal SRAM. No external
components are required to set offset and gain.
The MAX5331/MAX5332/MAX5333 feature a -4.5V to
+9.2V output voltage range. Other features include a
3.2mV/step resolution, with output linearity error, typi-
cally 0.03% of full-scale range (FSR). The 100kHz
refresh rate updates each SHA every 320µs, resulting
in negligible output droop. Remote ground sensing
allows the outputs to be referenced to the local ground
of a separate device.
These devices are controlled through a 20MHz
SPI™/QSPI™/MICROWIRE™-compatible 3-wire serial
interface. Immediate update mode allows any channel’s
output to be updated within 20µs. Burst mode allows
multiple values to be loaded into memory in a single,
high-speed data burst. All channels are updated within
330µs of data being loaded.
Each device features an output clamp and output resis-
tors for filtering. The MAX5331 features a 50Ω output
impedance and is capable of driving up to 250pF of
output capacitance. The MAX5332 features a 500Ω out-
put impedance and is capable of driving up to 10nF of
output capacitance. The MAX5333 features a 1kΩ out-
put impedance and is capable of driving up to 10nF of
output capacitance.
The MAX5331/MAX5332/MAX5333 are available in 12mm
x 12mm, 64-pin TQFP and 10mm x 10mm, 68-pin thin
QFN packages.
Features
♦
Integrated 12-Bit DAC and 32-Channel SHA with
SRAM and Sequencer
♦
32 Voltage Outputs
♦
0.03% FSR (typ) Output Linearity
♦
3.2mV Output Resolution
♦
Flexible Output Voltage Range
♦
Remote Ground Sensing
♦
Fast Sequential Loading: 1.3µs per Register
♦
Burst- and Immediate-Mode Addressing
♦
No External Components Required for Setting
Gain and Offset
♦
Integrated Output Clamp Diodes
♦
Three Output-Impedance Options
MAX5331 (50Ω), MAX5332 (500Ω), and
MAX5333 (1kΩ)
Ordering Information
PART
MAX5331UCB
MAX5331UTK*
MAX5332UCB
MAX5332UTK*
MAX5333UCB
MAX5333UTK*
TEMP RANGE
0°C to +85°C
0°C to +85°C
0°C to +85°C
0°C to +85°C
0°C to +85°C
0°C to +85°C
PIN-PACKAGE
64 TQFP
68 Thin QFN
64 TQFP
68 Thin QFN
64 TQFP
68 Thin QFN
*Future
product—contact factory for availability.
Pin Configurations
OUT31
OUT30
OUT29
OUT28
OUT27
OUT26
OUT25
OUT24
OUT22
CH
64
63 62 61 60 59 58
57 56 55 54 53 52 51 50 49
________________________Applications
MEMS Mirror Servo Control
Industrial Process Control
Automatic Test Equipment
Instrumentation
N.C.
N.C.
GS
V
LDAC
RST
CS
DIN
SCLK
V
LOGIC
CL
48
V
DD
47
CH
46
V
SS
45
OUT20
44
OUT19
43
OUT18
42
OUT17
41
OUT16
40
AGND
39
V
DD
38
OUT15
37
OUT14
36
OUT13
35
OUT12
34
OUT11
33
CL
TOP VIEW
1
2
3
4
5
6
7
8
9
IMMED
10
ECLK
11
CLKSEL
12
DGND
13
V
LSHA
14
AGND
15
V
SS
16
MAX5331
MAX5332
MAX5333
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
OUT0
OUT1
V
DD
OUT23
OUT21
CH
AGND
AGND
V
REF
AGND
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
TQFP
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
Pin Configurations continued at end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
OUT10
V
SS
CL
12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
MAX5331/MAX5332/MAX5333
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND.......................................................-0.3V to +12.2V
V
SS
to AGND .........................................................-6.0V to +0.3V
V
DD
to V
SS
...........................................................................+15V
V
LDAC
, V
LOGIC
, V
LSHA
to AGND or DGND ..............-0.3V to +6V
REF to AGND............................................................-0.3V to +6V
GS to AGND................................................................V
SS
to V
DD
CL and CH to AGND...................................................V
SS
to V
DD
Logic Inputs to DGND ..............................................-0.3V to +6V
DGND to AGND........................................................-0.3V to +2V
Maximum Current into OUT_ ............................................±10mA
Maximum Current Into Logic Inputs .................................±20mA
Continuous Power Dissipation (T
A
= +70°C)
64-Pin TQFP (derate 13.3mW/°C above +70°C) ............1066mW
68-Pin Thin QFN (derate 28.6mW/°C above +70°C) ......2285mW
Operating Temperature Range...............................0°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DC CHARACTERISTICS
Resolution
Output Range
Offset Voltage
Offset Voltage Tempco
Gain Error
Gain Tempco
Integral Linearity Error
Differential Linearity Error
Maximum Output Drive Current
DC Output Impedance
INL
DNL
I
OUT
R
OUT
V
OUT_
= -3.25V to +7.6V
V
OUT_
= -3.25V to +7.6V, monotonicity
guaranteed to 12 bits
Sinking and sourcing
MAX5331
MAX5332
MAX5333
MAX5331
Maximum Capacitive Load
DC Crosstalk
Power-Supply Rejection Ratio
PSRR
MAX5332
MAX5333
Internal oscillator enabled (Note 3)
Internal oscillator enabled
±2
35
350
700
50
500
1000
250
10
10
-90
-80
65
650
1300
pF
nF
dB
dB
Ω
(Note 2)
±5
0.03
±0.5
0.1
±1
N
V
OUT_
(Note 1)
Code = 4F3 hex
12
V
SS
+
0.75
±15
±50
±1
V
DD
-
2.4
±200
Bits
V
mV
µV/°C
%
ppm/°C
%FSR
LSB
mA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DYNAMIC CHARACTERISTICS
Sample-and-Hold Settling
SCLK Feedthrough
f
SEQ
Feedthrough
Hold Step
Droop Rate
Output Noise
REFERENCE INPUT
Input Resistance
Reference Input Voltage
GROUND-SENSE INPUT
Input Voltage Range
Input Bias Current
GS Gain
Input High Voltage
Input Low Voltage
Input Current
TIMING CHARACTERISTICS (Figure 2)
Sequencer Clock Frequency
External Clock Frequency
SCLK Frequency
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS-Low
to SCLK-High Setup
Time
CS-High
to SCLK-High Setup
Time
SCLK-High to
CS-Low
Hold Time
f
SEQ
f
ECLK
f
SCLK
t
CH
t
CL
t
CSSO
t
CSS1
t
CSH0
15
15
15
15
10
Internal oscillator
(Note 7)
80
100
120
480
20
kHz
kHz
MHz
ns
ns
ns
ns
ns
V
IH
V
IL
V
GS
I
GS
-0.5V
≤
V
GS
≤
0.5V
(Note 6)
-0.5
-60
0.998
2.0
0.8
±1
1
+0.5
0
1.002
V
µA
V/V
V
V
µA
V
REF
7
2.5
kΩ
V
V
OUT_
= 0 (Note 5)
(Note 4)
0.5
0.5
0.25
1
250
1
300
0.08
%
nV
•
s
nV
•
s
mV
µV/ms
µV
RMS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5331/MAX5332/MAX5333
DIGITAL-INTERFACE DC CHARACTERISTICS
_______________________________________________________________________________________
3
12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
MAX5331/MAX5332/MAX5333
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SCLK-High to
CS-High
Hold Time
DIN to SCLK High Setup Time
DIN to SCLK High Hold Time
RST-to-CS
Low
POWER SUPPLIES
Positive Supply Voltage
Negative Supply Voltage
Supply Difference
Logic Supply Voltage
Positive Supply Current
Negative Supply Current
Logic Supply Current
V
LOGIC
,
V
LDAC
,
V
LSHA
I
DD
I
SS
I
LOGIC
(Note 10)
f
SCLK
= 20MHz (Note 11)
-40
V
DD
V
SS
(Note 9)
(Note 9)
V
DD
- V
SS
(Note 9)
4.75
5
32
-32
1
2
1.5
3
8.55
-5.25
10
-4
11.60
-2.75
14.5
5.25
42
V
V
V
V
mA
mA
mA
SYMBOL
t
CSH1
t
DS
t
DH
(Note 8)
CONDITIONS
MIN
0
15
0
500
TYP
MAX
UNITS
ns
ns
ns
µs
Note 1:
The nominal zero-scale voltage (code = 0) is -4.0535V. The nominal full-scale voltage (code = FFF hex) is +9.0503V. The
output voltage is limited by the output range specification, restricting the usable range of DAC codes. The nominal zero-
scale voltage can be achieved when V
SS
< -4.9V, and the nominal full-scale voltage can be achieved when V
DD
> +11.5V.
Note 2:
Gain is calculated from measurements:
for voltages V
DD
= 10V and V
SS
= -4V at codes C00 hex and 4F3 hex
for voltages V
DD
= 11.6V and V
SS
= -2.9V at codes FFF hex and 253 hex
for voltages V
DD
= 9.25V and V
SS
= -5.25V at codes D4F hex and 0 hex
for voltages V
DD
= 8.55V and V
SS
= -2.75V at codes C75 hex and 282 hex
Note 3:
Steady-state change in any output with an 8V change in an adjacent output.
Note 4:
Settling during the first update for an 8V step. The output will settle to within the linearity specification on subsequent
updates. Tested with an external sequencer clock frequency of 480kHz.
Note 5:
External clock mode with the external clock not toggling.
Note 6:
The output voltage is the sum of the DAC output and the voltage at GS. GS gain is measured at 4F3 hex.
Note 7:
The sequencer runs at f
SEQ
= f
ECLK
/ 4. Maximum speed is limited by settling of the DAC and SHAs. Minimum speed is
limited by acceptable droop and update time after a burst-mode update.
Note 8:
V
DD
rise to
CS
low = 500µs maximum.
Note 9:
Guaranteed by gain-error test.
Note 10:
The serial interface is inactive. V
IH
= V
LOGIC
, V
IL
= 0.
Note 11:
The serial interface is active. V
IH
= V
LOGIC
, V
IL
= 0.
4
_______________________________________________________________________________________
12-Bit DACs with 32-Channel
Sample-and-Hold Outputs
Typical Operating Characteristics
(V
DD
= +10V, V
SS
= -4V, V
REF
= +2.5V, V
GS
= 0, T
A
= +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. INPUT CODE
MAX5331 toc01
MAX5331/MAX5332/MAX5333
DIFFERENTIAL NONLINEARITY
vs. INPUT CODE
MAX5331 toc02
INTEGRAL NONLINEARITY
VS.
TEMPERATURE
MAX5331 toc03
0.040
0.035
0.030
0.10
0.08
0.06
0.04
DNL (LSB)
0.05
0.04
INL (%)
0.025
0.020
0.015
0.010
250
930
1610
2290
INPUT CODE
2970
3650
0
-0.02
-0.04
-0.06
-0.08
-0.10
250
930
1610
2290
INPUT CODE
2970
3650
INL (%)
0.02
0.03
0.02
0.01
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
DIFFERENTIAL NONLINEARITY
VS.
TEMPERATURE
MAX5331 toc04
OFFSET VOLTAGE
VS.
TEMPERATURE
V
DD
= +8.55V
V
SS
= -4V
CODE = 4F3 hex
MAX5331 toc05
DROOP RATE vs. TEMPERATURE
CODE = 4F3 hex
EXTERNAL CLOCK MODE
NO CLOCK APPLIED
MAX5331 toc06
0.30
0.25
0.20
DNL (LSB)
0.15
0.10
0.05
0
-40
-15
10
35
60
-10
100
10
DROOP RATE (µV/ms)
1
0.1
0.01
0.001
0.0001
-12
OFFSET VOLTAGE (mV)
-14
-16
-18
-20
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
-40
-15
10
35
60
85
TEMPERATURE (°C)
GAIN ERROR
VS.
TEMPERATURE
MAX5331 toc07
POSITIVE SUPPLY PSRR
VS.
FREQUENCY
MAX5331 toc08
NEGATIVE SUPPLY PSRR
VS.
FREQUENCY
-80
-70
-60
PSRR (dB)
-50
-40
-30
-20
-10
0
0.001
0.01
0.1
1
10
100
MAX5331 toc09
0.05
-90
-80
-70
-60
PSRR (dB)
-90
0.04
GAIN ERROR (%)
0.03
-50
-40
-30
0.02
0.01
CODE = C17 hex
OFFSET CODE = 4F3 hex
-20
-10
85
0
0.01
0.1
1
FREQUENCY (kHz)
10
100
0
-40
-15
10
35
60
TEMPERATURE (°C)
FREQUENCY (kHz)
_______________________________________________________________________________________
5
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