PD - 97085
IRF6623PbF
IRF6623TRPbF
l
l
l
l
l
l
l
l
l
RoHS Compliant
Lead-Free (Qualified up to 260°C Reflow)
Application Specific MOSFETs
Ideal for CPU Core DC-DC Converters
Low Conduction Losses
High Cdv/dt Immunity
Low Profile (<0.7mm)
Dual Sided Cooling Compatible
Compatible with existing Surface Mount Techniques
DirectFET Power MOSFET
V
DSS
20V
R
DS(on)
max
5.7mΩ@V
GS
= 10V
9.7mΩ@V
GS
= 4.5V
Qg(typ.)
11nC
ST
Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details)
SQ
SX
ST
MQ
MX
MT
DirectFET ISOMETRIC
Description
The IRF6623PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packag-
ing to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and
vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufac-
turing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power
systems, improving previous best thermal resistance by 80%.
The IRF6623PbF balances both low resistance and low charge along with ultra low package inductance to reduce both
conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that
power the latest generation of processors operating at higher frequencies. The IRF6623PbF has been optimized for param-
eters that are critical in synchronous buck operating from 12 volt bus converters including Rds(on) and gate charge to
minimize losses in the control FET socket.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
C
= 25°C
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
C
= 25°C
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
E
AS
I
AR
T
J
T
STG
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
Continuous Drain Current, V
GS
Pulsed Drain Current
Power Dissipation
Continuous Drain Current, V
GS
@ 10V
Max.
20
±20
55
16
13
120
42
1.4
Units
V
i
Power Dissipation
f
Power Dissipation
f
i
@ 10V
Ãf
@ 10V
f
A
W
mJ
A
W/°C
°C
Single Pulse Avalanche Energy
Avalanche Current
Ã
d
2.1
43
40
0.017
-40 to + 150
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Thermal Resistance
R
θJA
R
θJA
R
θJA
R
θJC
R
θJ-PCB
fj
Junction-to-Ambient
gj
Junction-to-Ambient
hj
Junction-to-Case
ij
Junction-to-Ambient
Parameter
Typ.
–––
12.5
20
–––
1.0
Max.
58
–––
–––
3.0
–––
Units
°C/W
Junction-to-PCB Mounted
Notes
through
are on page 2
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1
5/3/06
IRF6623PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
BV
DSS
∆ΒV
DSS
/∆T
J
R
DS(on)
V
GS(th)
∆V
GS(th)
/∆T
J
I
DSS
I
GSS
gfs
Q
g
Q
gs1
Q
gs2
Q
gd
Q
godr
Q
sw
Q
oss
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
20
–––
–––
–––
1.4
–––
–––
–––
–––
–––
34
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
–––
15
4.4
7.5
–––
-5.4
–––
–––
–––
–––
–––
11
3.3
1.2
4.0
2.5
5.2
8.9
9.7
40
12
4.5
1360
630
240
–––
–––
5.7
9.7
2.2
–––
1.0
150
100
-100
–––
17
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
pF
V
GS
= 0V
V
DS
= 10V
ƒ = 1.0MHz
ns
nC
nC
V
DS
= 10V
V
GS
= 4.5V
I
D
= 12A
See Fig. 16
S
nA
V
mV/°C
µA
V
mΩ
Conditions
V
GS
= 0V, I
D
= 250µA
V
GS
= 10V, I
D
= 15A
e
V
GS
= 4.5V, I
D
= 12A
e
V
DS
= V
GS
, I
D
= 250µA
V
DS
= 16V, V
GS
= 0V
V
DS
= 16V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
V
DS
= 10V, I
D
= 12A
mV/°C Reference to 25°C, I
D
= 1mA
V
DS
= 10V, V
GS
= 0V
V
DD
= 16V, V
GS
= 4.5V
e
I
D
= 12A
Clamped Inductive Load
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
c
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min.
–––
–––
–––
–––
–––
Typ. Max. Units
–––
–––
0.81
20
12
53
A
120
1.0
30
18
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
p-n junction diode.
T
J
= 25°C, I
S
= 12A, V
GS
= 0V
e
T
J
= 25°C, I
F
= 12A
di/dt = 100A/µs
e
Notes:
Repetitive rating; pulse width limited by
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
max. junction temperature.
Starting T
J
= 25°C, L = 0.61mH,
R
G
= 25Ω, I
AS
= 12A.
Pulse width
≤
400µs; duty cycle
≤
2%.
Surface mounted on 1 in. square Cu board.
Used double sided cooling, mounting pad.
T
C
measured with thermal couple mounted to top (Drain) of
part.
R
θ
is measured at
T
J
of approximately 90°C.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
2
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IRF6623PbF
1000
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
1000
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
1
2.5V
≤
60µs PULSE WIDTH
Tj = 25°C
2.5V
≤
60µs PULSE WIDTH
Tj = 150°C
1
0.1
1
10
100
0.1
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
Fig 2.
Typical Output Characteristics
1.5
100
TJ = 150°C
10
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
ID = 15A
VGS = 10V
1.0
1
TJ = 25°C
VDS = 10V
≤
60µs PULSE WIDTH
0.1
2.5
3.0
3.5
4.0
4.5
5.0
0.5
-60 -40 -20
0
20
40
60
80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
T J , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
10000
Fig 4.
Normalized On-Resistance vs. Temperature
12
ID= 11A
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
10
8
6
4
2
0
VDS= 20V
VDS= 10V
C, Capacitance (pF)
Ciss
1000
Coss
Crss
100
1
10
100
0
10
20
30
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs.Drain-to-Source Voltage
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Fig 6.
Typical Gate Charge vs.Gate-to-Source Voltage
3
IRF6623PbF
1000.0
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ISD, Reverse Drain Current (A)
100.0
T J = 150°C
10.0
100
100µsec
10
1msec
10msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
0
1
10
100
1.0
T J = 25°C
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode Forward Voltage
60
2.5
Fig 8.
Maximum Safe Operating Area
50
40
VGS(th) Gate threshold Voltage (V)
ID , Drain Current (A)
2.0
30
ID = 250µA
20
1.5
10
0
25
50
75
100
125
150
1.0
-75
-50
-25
0
25
50
75
100
125
150
T J , Junction Temperature (°C)
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs. Case Temperature
100
Fig 10.
Threshold Voltage vs. Temperature
D = 0.50
Thermal Response ( Z thJA )
10
0.20
0.10
0.05
1
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
C
τ
A
τ
τ
4
Ri (°C/W)
2.023
19.48
21.78
14.71
τi
(sec)
0.000678
0.240237
2.0167
58
0.1
τ
1
τ
2
τ
3
τ
4
0.01
Ci=
τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
0.01
0.1
1
10
100
0.001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
4
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IRF6623PbF
RDS(on), Drain-to -Source On Resistance ( mΩ)
20
200
ID = 15A
16
EAS, Single Pulse Avalanche Energy (mJ)
160
ID
TOP
5.2A
7.9A
BOTTOM
12A
120
12
80
8
T J = 125°C
T J = 25°C
40
4
2.0
4.0
6.0
8.0
10.0
0
25
50
75
100
125
150
VGS, Gate-to-Source Voltage (V)
Starting T J, Junction Temperature (°C)
Fig 12.
On-Resistance Vs. Gate Voltage
Fig 13.
Maximum Avalanche Energy Vs. Drain Current
V
(BR)DSS
15V
tp
DRIVER
VDS
L
RG
V
GS
20V
D.U.T
IAS
tp
+
V
- DD
A
0.01
Ω
I
AS
Fig 14a.
Unclamped Inductive Test Circuit
L
D
V
DS
Fig 14b.
Unclamped Inductive Waveforms
+
V
DD
-
D.U.T
V
GS
Pulse Width < 1µs
Duty Factor < 0.1%
90%
V
DS
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 15a.
Switching Time Test Circuit
Fig 15b.
Switching Time Waveforms
Id
Vds
Vgs
L
0
DUT
1K
VCC
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 16a.
Gate Charge Test Circuit
Fig 16b.
Gate Charge Waveform
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