NXP Semiconductors
Data Sheet: Technical Data
Document Number VYBRIDRSERIESEC
Rev. 8, 01/2018
VF3xxR, VF5xxR
Features
• Operating characteristics
– Voltage range 3 V to 3.6 V
– Temperature range(ambient) -40 °C to 85 °C
• ARM® Cortex® A5 Core features
– Up to 400 MHz ARM® Cortex® A5 core
– 32 KB/32 KB I/D L1 Cache
– 1.6 DMIPS/MHz based on ARMv7 architecture
– NEON™ MPE (Media Processing Engine) Co-
processor
– Double Precision Floating Point Unit
– 512 KB L2 cache (on selected part numbers only)
• ARM Cortex M4 Core features
– Up to 133 MHz ARM Cortex M4
– Integrated DSP capability
– 64 KB Tightly Coupled Memory (TCM)
– 16 KB/16 KB I/D L1 Cache
– 1.25 DMIPS/MHz based on ARMv7 architecture
• Clocks
– 24 MHz crystal oscillator
– 32 kHz crystal oscillator
– Internal reference clocks (128 KHz and 24 MHz)
– Phase Locked Loops (PLLs)
– Low Jitter Digital PLLs
• System debug, protection, and power management
– Various stop, wait, and run modes to provide low
power based on application needs
– Peripheral clock enable register can disable clocks to
unused modules, thereby reducing currents
– Low voltage warning and detect with selectable trip
points
– Illegal opcode and illegal address detection with
programmable reset or processor exception response
– Hardware CRC module to support fast cyclic
redundancy checks (CRC)
– 128-bit unique chip identifier
– Hardware watchdog
– External Watchdog Monitor (EWM)
– Dual DMA controller with 32 channels (with
DMAMUX)
VYBRIDRSERIESEC
• Debug
– Standard JTAG
– 16-bit Trace port
• Timers
– Motor control/general purpose timer (FTM)
– Periodic Interrupt Timers (PITs)
– Low-power timer (LPTMR0)
– IEEE 1588 Timer per MAC interface (part of
Ethernet Subsystem)
• Communications
– Six Universal asynchronous receivers/transmitters
(UART)/Serial communications interface (SCI) with
LIN, ISO7816, IrDA, and hardware flow control
– Four Deserial Serial peripheral interface (DSPI)
– Four Inter-Integrated Circuit (I2C) with SMBUS
support
– Dual USB OTG Controller + PHY
– Dual 4/8 bit Secure Digital Host controller
– Local Media Bus (MLB50)
– Dual 10/100 Ethernet (IEEE 1588)
– Dual FlexCAN3
• Security
– ARM TrustZone including the TZ architecture
– Secure Non-Volatile Storage (SNVS)
– Real Time Clock
– Real Time Integrity Checker (RTIC)
– TrustZone Watchdog (TZ WDOG)
– Trust Zone Address Space Controller
– Random Number Generator
– Hashing
– Secure JTAG
• Memory Interfaces
– 8/16-bit DRAM Controller with support for
LPDDR2/DDR3 - Up to 400 MHz (ECC supported
for 8-bit only and not 16-bit)
– 8/16-bit NAND Flash controller with ECC (ECC
supported for 8-bit only and not 16-bit)
– Dual Quad SPI with XIP (Execute-In-Place)
– 8/16/32-bit External bus (Flexbus)
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
• Display and Video
– Dual Display Control Unit (DCU) with support for color TFT display up to WVGA
– Segmented LCD (3V Glass only) configurable as 40x4, 38x8, and 36x6
– Video Interface Unit (VIU) for camera
– Open VG Graphics Processing Unit (GPU)
– VideoADC
• Analog
– Dual 12-bit SAR ADC with 1MS/s
– Dual 12-bit DAC
• Audio
– Four Synchronous Audio Interface (SAI)
– Enhanced Serial Audio Interface (ESAI)
– Sony Philips Digital Interface (SPDIF), Rx and Tx
– Asynchronous Sample Rate Converter (ASRC)
• Human-Machine Interface (HMI)
– GPIO pins with interrupt support, DMA request capability, digital glitch filter.
– Hysteresis and configurable pull up/down device on all input pins
– Configurable slew rate and drive strength on all output pins
• On-Chip Memory
– 512 KB On-chip SRAM with ECC
– 1 MB On-chip graphics SRAM (no ECC). This depends on the part selected. Alternate configuration could be 512 KB
graphics and 512 KB L2 cache.
– 96 KB Boot ROM
VF3xxR, VF5xxR, Rev. 8, 01/2018
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NXP Semiconductors
Table of Contents
1
Ordering parts.....................................................................................5
1.1
2
Determining valid orderable parts ..........................................5
6.2.6
6.2.7
6.2.5.1
Power Down Mode............................. 20
EMC radiated emissions operating behaviors........ 21
EMC Radiated Emissions Web Search Procedure
boilerplate............................................................... 21
6.2.8
7
Capacitance attributes............................................. 21
Part identification............................................................................... 5
2.1
2.2
2.3
3
Description.............................................................................. 5
Part Number Format................................................................5
Part Numbers ..........................................................................6
I/O parameters....................................................................................22
7.1
GPIO parameters..................................................................... 22
7.1.1
7.2
Output Buffer Impedance measurement................. 24
Terminology and guidelines...............................................................7
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Definition: Operating requirement.......................................... 7
Definition: Operating behavior............................................... 8
Definition: Attribute................................................................8
Definition: Rating....................................................................8
Result of exceeding a rating.................................................... 9
Relationship between ratings and operating requirements......9
Guidelines for ratings and operating requirements................. 10
Definition: Typical value........................................................ 10
Typical Value Conditions........................................................11
9
8
DDR parameters......................................................................24
Power supplies and sequencing..........................................................28
8.1
8.2
8.3
8.4
8.5
Power sequencing ...................................................................28
Power supply........................................................................... 29
Absolute maximum ratings..................................................... 31
Recommended operating conditions....................................... 32
Recommended Connections for Unused Analog Interfaces... 33
Peripheral operating requirements and behaviours............................ 34
9.1
Analog..................................................................................... 34
9.1.1
12-bit ADC electrical characteristics...................... 34
9.1.1.1
9.1.1.2
9.1.2
12-bit ADC operating conditions........ 34
12-bit ADC characteristics..................35
4
Handling ratings................................................................................. 11
4.1
4.2
4.3
ESD handling ratings ............................................................. 11
Thermal handling ratings........................................................ 12
Moisture handling ratings........................................................12
5
Operating Requirements.....................................................................12
5.1
Thermal operating requirements............................................. 12
12-bit DAC electrical characteristics...................... 39
9.1.2.1
9.1.2.2
12-bit DAC operating requirements....39
12-bit DAC operating behaviors......... 39
6
General............................................................................................... 12
6.1
6.2
AC electrical characteristics....................................................12
Nonswitching electrical specifications ...................................13
6.2.1
VREG electrical specifications .............................. 13
6.2.1.1
6.2.1.2
6.2.1.3
6.2.1.4
6.2.1.5
6.2.2
HPREG electrical characteristics........ 13
LPREG electrical characteristics.........14
ULPREG electrical characteristics......14
WBREG electrical characteristics.......15
External NPN Ballast.......................... 15
9.2.2
9.2.3
9.3
9.2
9.1.3
VideoADC Specifications.......................................43
Display and Video interfaces.................................................. 45
9.2.1
DCU Switching Specifications............................... 45
9.2.1.1
9.2.1.2
Interface to TFT panels (DCU0/1)......45
Interface to TFT LCD Panels—Pixel
Level Timings..................................... 46
9.2.1.3
Interface to TFT LCD panels—access
level..................................................... 47
Video Input Unit timing..........................................48
LCD driver electrical characteristics...................... 49
LVD electrical specifications .................................17
6.2.2.1
6.2.2.2
Main Supply electrical characteristics 17
LVD DIG characteristics.....................18
Ethernet specifications............................................................ 50
9.3.1
9.3.2
9.3.3
Ethernet Switching Specifications.......................... 50
Receive and Transmit signal timing specifications 50
Receive and Transmit signal timing specifications
for MII interfaces.................................................... 51
6.2.3
LDO electrical specifications .................................18
6.2.3.1
6.2.3.2
6.2.3.3
LDO_1P1............................................ 18
LDO_2P5............................................ 19
LDO_3P0 ........................................... 19
9.4
6.2.4
6.2.5
Power consumption operating behaviors................ 20
USB PHY current consumption..............................20
Audio interfaces...................................................................... 53
VF3xxR, VF5xxR, Rev. 8, 01/2018
NXP Semiconductors
3
9.4.1
Enhanced Serial Audio Interface (ESAI) Timing
Parameters...............................................................53
9.7.4
Slow internal RC oscillator (128 KHz) electrical
characteristics..........................................................84
9.4.2
9.4.3
9.5
SPDIF Timing Parameters...................................... 55
SAI/I2S Switching Specifications.......................... 56
9.7.5
PLL1 and PLL2 (528 MHz System PLL)
Electrical Parameters.............................................. 84
Memory interfaces...................................................................58
9.5.1
9.5.2
9.5.3
9.5.4
QuadSPI timing.......................................................58
NAND flash controller specifications.....................61
FlexBus timing specifications.................................64
DDR controller specifications................................ 66
9.5.4.1
9.5.4.2
9.5.4.3
9.5.4.4
9.5.4.5
9.5.4.6
DDR3 Timing Parameters ..................66
DDR3 Read Cycle...............................68
DDR3 Write cycle...............................69
LPDDR2 Timing Parameter................70
LPDDR2 Read Cycle.......................... 71
LPDDR2 Write Cycle......................... 72
9.8
9.7.6
PLL3 and PLL7 (480 MHz USB PLL) Electrical
Parameters...............................................................84
9.7.7
9.7.8
9.7.9
PLL5 (Ethernet PLL) Electrical Parameters........... 85
PLL4 (Audio PLL) Electrical Parameters...............85
PLL6 (Video PLL) Electrical Parameters...............85
Debug specifications............................................................... 86
9.8.1
9.8.2
JTAG electricals..................................................... 86
Debug trace timing specifications...........................88
10 Thermal attributes.............................................................................. 89
10.1 Thermal attributes................................................................... 89
11 Dimensions.........................................................................................90
11.1 Obtaining package dimensions ...............................................90
12 Pinouts................................................................................................91
12.1 Pinouts.....................................................................................91
12.2 Pinout diagrams.......................................................................103
12.2.1
12.2.2
GPIO Mapping........................................................105
Special Signal ........................................................ 109
9.6
Communication interfaces.......................................................73
9.6.1
9.6.2
MediaLB (MLB) DC Characteristics..................... 73
MediaLB (MLB) Controller AC Timing Electrical
Specifications..........................................................73
9.6.3
9.6.4
9.6.5
9.6.6
DSPI timing specifications..................................... 75
I2C timing............................................................... 78
SDHC specifications...............................................80
USB PHY specifications.........................................81
13 Power Supply Pins............................................................................. 111
13.1 Power Supply Pins.................................................................. 111
14 Functional Assignment Pins...............................................................112
14.1 Functional Assignment Pins....................................................112
15 Revision History.................................................................................121
9.7
Clocks and PLL Specifications............................................... 81
9.7.1
9.7.2
9.7.3
24 MHz Oscillator Specifications...........................81
32 KHz Oscillator Specifications........................... 82
Fast internal RC oscillator (24 MHz) electrical
characteristics..........................................................83
VF3xxR, VF5xxR, Rev. 8, 01/2018
4
NXP Semiconductors
Ordering parts
1 Ordering parts
1.1 Determining valid orderable parts
Valid orderable part numbers are provided on the web.
1. To determine the orderable part numbers for this device, go to
www.nxp.com
and
search the required part number. The part numbering format is described in the
section that follows.
2 Part identification
2.1 Description
Part numbers for the chip have fields that identify the specific part. You can use the
values of these fields to determine the specific part you have received.
2.2 Part Number Format
The figure below represents the format of part number of this device.
VF3xxR, VF5xxR, Rev. 8, 01/2018
NXP Semiconductors
5
FPGA/CPLD
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