74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
Rev. 4 — 21 November 2017
Product data sheet
1
General description
The 74ALVC16245; 74ALVCH16245 is a 16-bit transceiver featuring non-inverting
3-state bus compatible outputs in both send and receive directions.
The 74ALVC16245; 74ALVCH16245 features two output enable inputs (pins nOE) for
easy cascading and two send or receive inputs (pins nDIR) for direction control. Pins
nOE control the outputs so that the buses are effectively isolated. This device can be
used as two 8-bit transceivers or one 16-bit transceiver.
The 74ALVCH16245 has an active bushold circuitry which is provided to hold unused
or floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
2
Features and benefits
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple V
CC
and GND pins for minimize noise and ground bounce
Direct interface with TTL levels
All data inputs have bushold (74ALVCH16245 only)
Output drive capability 50 Ω transmission lines at 85 °C
Current drive ±24 mA at V
CC
= 3.0 V.
Complies with JEDEC standards:
–
JESD8-5 (2.3 V to 2.7 V)
–
JESD8B/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
–
HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
–
CDM JESD22-C101E exceeds 1000 V
3
Ordering information
Package
Temperature range Name
Description
plastic shrink small outline package; 48 leads;
body width 7.5 mm
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
Version
SOT370-1
SOT362-1
-40 °C to +85 °C
-40 °C to +85 °C
SSOP48
TSSOP48
Table 1. Ordering information
Type number
74ALVC16245DL
74ALVCH16245DL
74ALVC16245DGG
74ALVCH16245DGG
Nexperia
74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
4
Functional diagram
1OE
1DIR
2OE
2DIR
G3
3EN1[BA]
3EN2[AB]
G6
6EN1[BA]
6EN2[AB]
1
1DIR
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
1OE
48
24
2DIR
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2OE
25
001aaa853
1A0
1
2
1B0
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
2A1
2A2
2A3
2A4
2A5
2A6
2A7
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
4
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
5
2B1
2B2
2B3
2B4
2B5
2B6
2B7
001aaa790
Figure 1. Logic symbol
VCC
Figure 2. IEC logic symbol
data
input
to internal circuit
mna004
Figure 3. Bushold circuit
74ALVC_ALVCH16245
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 21 November 2017
2 / 16
Nexperia
74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
1DIR
1OE
1A0
1B0
1A1
1B1
1A2
1B2
1A3
1B3
1A4
1B4
1A5
1B5
1A6
1B6
1A7
1B7
2DIR
2OE
2A0
2B0
2A1
2B1
2A2
2B2
2A3
2B3
2A4
2B4
2A5
2B5
2A6
2B6
2A7
2B7
001aaa789
Figure 4. Logic diagram
74ALVC_ALVCH16245
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 21 November 2017
3 / 16
Nexperia
74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
5
Pinning information
5.1 Pinning
74ALVC16245
74ALVCH16245
1DIR
1B0
1B1
GND
1B2
1B3
V
CC
1B4
1B5
1
2
3
4
5
6
7
8
9
48 1OE
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
42 V
CC
41 1A4
40 1A5
39 GND
38 1A6
37 1A7
36 2A0
35 2A1
34 GND
33 2A2
32 2A3
31 V
CC
30 2A4
29 2A5
28 GND
27 2A6
26 2A7
25 2OE
aaa-027716
GND 10
1B6 11
1B7 12
2B0 13
2B1 14
GND 15
2B2 16
2B3 17
V
CC
18
2B4 19
2B5 20
GND 21
2B6 22
2B7 23
2DIR 24
Figure 5. Pin configuration (T)SSOP48
5.2 Pin description
Table 2. Pin description
Pin
1, 24
2, 3, 5, 6, 8, 9, 11, 12
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
13, 14, 16, 17, 19, 20, 22, 23
48, 25
36, 35, 33, 32, 30, 29, 27, 26
47, 46, 44, 43, 41, 40, 38, 37
Symbol
1DIR, 2DIR
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7
GND
V
CC
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7
1OE, 2OE
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
Description
direction control inputs
data output or input
ground (0 V)
positive supply voltage
data output or input
output enable input (active LOW)
data input or output
data input or output
74ALVC_ALVCH16245
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 21 November 2017
4 / 16
Nexperia
74ALVC16245; 74ALVCH16245
16-bit transceiver with direction pin; 3-state
6
Functional description
[1]
Table 3. Function table
Input
nOE
L
L
H
Input or output
nDIR
L
H
X
nAn
output nAn = nBn
input
Z
nBn
input
output nBn = nAn
Z
[1] H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state.
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
Parameter
supply voltage
input voltage
data inputs with bushold
data inputs without bushold
control pins
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +85 °C
SSOP package
TSSOP package
[2]
[3]
[1]
[1]
[1]
[1]
Conditions
Min
-0.5
-0.5
-0.5
-0.5
-0.5
-50
-
-
-
-100
-65
-
-
Max
+4.6
V
CC
+ 0.5
+4.6
+4.6
V
CC
+ 0.5
-
±50
±50
100
-
+150
850
600
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
°C
mW
mW
V
I
< 0 V
V
O
> V
CC
or V
O
< 0 V
V
O
= 0 V to V
CC
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 55 °C the value of P
tot
derates linearly with 11.3 mW/K.
[3] Above 55 °C the value of P
tot
derates linearly with 8 mW/K.
74ALVC_ALVCH16245
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 21 November 2017
5 / 16
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