IRFI840GLC, SiHFI840GLC
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
(Ω)
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
TO-220 FULLPAK
FEATURES
500
0.85
39
10
19
Single
D
V
GS
= 10 V
•
•
•
•
•
•
•
•
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Available
Enhanced 30 V V
GS
Rating
RoHS*
COMPLIANT
Isolated Package
High Voltage Isolation = 2.5 kV
RMS
(t = 60 s; f = 60 Hz)
Sink to Lead Creepage Distance = 4.8 mm
Repetitve Avalanche Rated
Lead (Pb)-free Available
DESCRIPTION
This new series of low charge Power MOSFETs achieve
significantly lower gate charge over conventional MOSFETs.
Utilizing advanced Power MOSFET technology, the device
improvements allow for reduced gate drive requirements,
faster switching speeds and increased total system savings.
These device improvements combined with the proven
ruggedness and reliability that are characteristic of
MOSFETs offer the designer a new standard in power
transistors for switching applications.
The TO-220 FULLPAK eliminates the need for additional
insulating hardware. The molding compound used provides
a high isolation capability and low thermal resistance
between the tab and external heatsink.
G
G D S
S
N-Channel
MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
TO-220 FULLPAK
IRFI840GLCPbF
SiHFI840GLC-E3
IRFI840GLC
SiHFI840GLC
ABSOLUTE MAXIMUM RATINGS
T
C
= 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain
Linear Derating Factor
Single Pulse Avalanche Energy
b
Repetitive Avalanche Current
a
Repetitive Avalanche Energy
a
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
Current
a
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
LIMIT
500
± 30
4.5
2.9
18
0.32
300
4.5
4.0
40
3.5
- 55 to + 150
300
d
10
1.1
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
T
C
= 25 °C
for 10 s
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= 50 V, starting T
J
= 25 °C, L = 26 mH, R
G
= 25
Ω,
I
AS
= 4.5 A (see fig. 12).
c. I
SD
≤
8.0 A, dI/dt
≤
100 A/µs, V
DD
≤
V
DS
, T
J
≤
150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91160
S-81292-Rev. A, 16-Jun-08
www.vishay.com
1
IRFI840GLC, SiHFI840GLC
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
65
3.1
UNIT
°C/W
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Drain to Sink Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current
a
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
ΔV
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
V
GS
= 0 V, I
D
= 250 µA
Reference to 25 °C, I
D
= 1 mA
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= ± 20 V
V
DS
= 500 V, V
GS
= 0 V
V
DS
= 400 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 2.7 A
b
V
DS
= 50 V, I
D
= 4.8 A
b
500
-
2.0
-
-
-
-
4.0
-
0.63
-
-
-
-
-
-
-
-
4.0
± 100
25
250
0.85
-
V
V/°C
V
nA
µA
mΩ
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
f = 1.0 MHz
-
-
-
-
-
1100
170
18
12
-
-
-
12
25
27
19
4.5
7.5
-
-
-
-
39
10
19
-
-
-
-
-
nH
-
ns
nC
pF
V
GS
= 10 V
I
D
= 8.0 A, V
DS
= 400 V
see fig. 6 and 13
b
-
-
-
V
DD
= 250 V, I
D
= 8.0 A,
R
G
= 9.1Ω
,
Rr
D
= 30
Ω,
V
GS
= 10 V,
see fig. 10
b
-
-
-
Between lead,
6 mm (0.25") from
package and center of
die contact
D
-
-
G
S
-
-
-
-
-
490
3.0
4.5
A
18
2.0
740
4.5
V
ns
µC
G
S
T
J
= 25 °C, I
S
= 4.5 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 8.0 A, dI/dt = 100 A/µs
b
-
-
-
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
≤
300 µs; duty cycle
≤
2 %.
www.vishay.com
2
Document Number: 91160
S-81292-Rev. A, 16-Jun-08
IRFI840GLC, SiHFI840GLC
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, T
C
= 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91160
S-81292-Rev. A, 16-Jun-08
www.vishay.com
3
IRFI840GLC, SiHFI840GLC
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91160
S-81292-Rev. A, 16-Jun-08
IRFI840GLC, SiHFI840GLC
Vishay Siliconix
R
D
V
DS
V
GS
R
G
D.U.T.
+
-
V
DD
10
V
Pulse
width
≤
1
µs
Duty factor
≤
0.1
%
Fig. 10a - Switching Time Test Circuit
V
DS
90
%
10
%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary
t
p
to obtain
required I
AS
R
G
V
DS
V
DS
t
p
D.U.T
I
AS
+
-
V
DD
A
10
V
t
p
0.01
Ω
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91160
S-81292-Rev. A, 16-Jun-08
Fig. 12b - Unclamped Inductive Waveforms
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