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89H32T8G2ZCBL8: 产品描述PCI Interface IC PCIE GEN2 SWITCH; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小239KB，共39页; 制造商IDT (Integrated Device Technology)

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89H32T8G2ZCBL8概述

PCI Interface IC PCIE GEN2 SWITCH

89H32T8G2ZCBL8规格参数

参数名称	属性值
Brand Name	Integrated Device Technology
是否无铅	含铅
是否Rohs认证	不符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	FCBGA
包装说明	BGA,
针数	484
制造商包装代码	BL484
Reach Compliance Code	not_compliant
ECCN代码	EAR99
其他特性	HAVING 125MHZ INPUT REFERENCE CLOCK FREQUENCY.
总线兼容性	I2C; ISA; SMBUS; VGA
最大数据传输速率	32000 MBps
JESD-30 代码	S-PBGA-B484
JESD-609代码	e0
长度	23 mm
湿度敏感等级	4
端子数量	484
最高工作温度	70 °C
最低工作温度
封装主体材料	PLASTIC/EPOXY
封装代码	BGA
封装形状	SQUARE
封装形式	GRID ARRAY
峰值回流温度（摄氏度）	225
座面最大高度	3.32 mm
最大供电电压	1.1 V
最小供电电压	0.9 V
标称供电电压	1 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	Tin/Lead (Sn/Pb)
端子形式	BALL
端子节距	1 mm
端子位置	BOTTOM
处于峰值回流温度下的最长时间	NOT SPECIFIED
宽度	23 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI

文档解析

这款IDT 89HPES32T8G2交换机支持热插拔功能，对于数据中心的维护和运营，热插拔功能带来的好处包括：

不中断服务：热插拔技术允许在不关闭整个系统的情况下，对硬件设备进行插入或拔出操作。这意味着数据中心可以在不中断服务的情况下进行硬件的维护和升级，提高了系统的可用性和稳定性。
维护简便：由于可以在系统运行时更换故障或需要升级的组件，数据中心的维护工作变得更加简便快捷，减少了维护时间和成本。
故障恢复快：在出现硬件故障时，可以迅速更换故障模块，而不必等待系统重新启动，加快了故障恢复时间。
提高系统灵活性：热插拔功能使得数据中心可以根据需要灵活地增加或减少资源，如在高负载时增加更多的交换机端口，以满足不断变化的业务需求。
降低风险：减少了因维护操作导致的系统重启次数，从而降低了因重启引起的数据丢失或服务中断的风险。
提高能源效率：热插拔允许在不影响其他组件的情况下关闭或更换单个组件，有助于更精确地管理能源使用，提高整体能源效率。
支持远程管理：许多支持热插拔的系统还支持远程管理，这意味着维护人员可以在不亲临现场的情况下进行硬件更换和系统维护，进一步提高了维护的便捷性和效率。

总的来说，热插拔功能为数据中心提供了更高的灵活性、可用性和维护效率，是现代数据中心不可或缺的特性之一。

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32-Lane 8-Port PCIe® Gen2

I/O Expansion Switch

89HPES32T8G2

Data Sheet

Device Overview

The 89HPES32T8G2 is a member of the IDT PRECISE™ family of

PCI Express® switching solutions. The PES32T8G2 is a 32-lane, 8-port

switch optimized for PCI Express Gen2 packet switching in high-perfor-

mance applications. Target applications include servers, storage,

communications, embedded systems, and multi-host or intelligent I/O

based systems with inter-domain communication.



• Drive strength

Initialization / Configuration

Features

High Performance Non-Blocking Switch Architecture

–

32-lane 8-port PCIe switch

• Four x8 switch ports each of which can bifurcate to two x4

ports (total of eight x4 ports)

–

Integrated SerDes supports 5.0 GT/s Gen2 and 2.5 GT/s

Gen1 operation

–

Delivers up to 32 GBps (256 Gbps) of switching capacity

–

Supports 128 Bytes to 2 KB maximum payload size

–

Low latency cut-through architecture

–

Supports one virtual channel and eight traffic classes



Standards and Compatibility

–

PCI Express Base Specification 2.0 compliant

–

Implements the following optional PCI Express features

• Advanced Error Reporting (AER) on all ports

• End-to-End CRC (ECRC)

• Access Control Services (ACS)

• Power Budgeting Enhanced Capability

• Device Serial Number Enhanced Capability

• Sub-System ID and Sub-System Vendor ID Capability

• Internal Error Reporting ECN

• Multicast ECN

• VGA and ISA enable

• L0s and L1 ASPM

• ARI ECN



Port Configurability

–

x4 and x8 ports

• Ability to merge adjacent x4 ports to create a x8 port

–

Automatic per port link width negotiation

(x8

→

x1)

–

Crosslink support

–

Automatic lane reversal

–

Autonomous and software managed link width and speed

control

–

Per lane SerDes configuration

• De-emphasis

• Receive equalization

–

Supports Root (BIOS, OS, or driver), Serial EEPROM, or

SMBus switch initialization

–

Common switch configurations are supported with pin strap-

ping (no external components)

–

Supports in-system Serial EEPROM initialization/program-

ming



Quality of Service (QoS)

–

Port arbitration

• Round robin

–

Request metering

• IDT proprietary feature that balances bandwidth among

switch ports for maximum system throughput

–

High performance switch core architecture

• Combined Input Output Queued (CIOQ) switch architecture

with large buffers



Multicast

–

Compliant to the PCI-SIG multicast ECN

–

Supports arbitrary multicasting of Posted transactions

–

Supports 64 multicast groups

–

Multicast overlay mechanism support

–

ECRC regeneration support



Clocking

–

Supports 100 MHz and 125 MHz reference clock frequencies

–

Flexible clocking modes

• Common clock

• Non-common clock



Hot-Plug and Hot Swap

–

Hot-plug controller on all ports

• Hot-plug supported on all downstream switch ports

–

All ports support hot-plug using low-cost external I

C I/O

expanders

–

Configurable presence detect supports card and cable appli-

cations

–

GPE output pin for hot-plug event notification

• Enables SCI/SMI generation for legacy operating system

support

–

Hot-swap capable I/O



Power Management

–

Supports D0, D3hot and D3 power management states

–

Active State Power Management (ASPM)

• Supports L0, L0s, L1, L2/L3 Ready and L3 link states

• Configurable L0s and L1 entry timers allow performance/

power-savings tuning

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.

1 of 39



2011 Integrated Device Technology, Inc.

November 28, 2011

89H32T8G2ZCBL8相似产品对比

	89H32T8G2ZCBL8	89H32T8G2ZCBLI8	89H32T8G2ZCBL	89H32T8G2ZCBLG	89H32T8G2ZCBLGI8
描述	PCI Interface IC PCIE GEN2 SWITCH	PCI Interface IC PCIE GEN2 SWITCH	PCI Interface IC PCIE GEN2 SWITCH	PCI Interface IC PCIE GEN2 SWITCH	PCI Interface IC PCIE GEN2 SWITCH
Brand Name	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology
是否无铅	含铅	含铅	含铅	不含铅	不含铅
是否Rohs认证	不符合	不符合	不符合	符合	符合
厂商名称	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
零件包装代码	FCBGA	FCBGA	FCBGA	FCBGA	FCBGA
包装说明	BGA,	BGA,	FCBGA-484	FCBGA-484	BGA,
针数	484	484	484	484	484
制造商包装代码	BL484	BL484	BL484	BLG484	BLG484
Reach Compliance Code	not_compliant	not_compliant	not_compliant	compliant	compliant
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99
其他特性	HAVING 125MHZ INPUT REFERENCE CLOCK FREQUENCY.	HAVING 125MHZ INPUT REFERENCE CLOCK FREQUENCY.	OPERATES AT 125 MHZ CLOCK FREQUENCY	OPERATES AT 125 MHZ CLOCK FREQUENCY	HAVING 125MHZ INPUT REFERENCE CLOCK FREQUENCY.
总线兼容性	I2C; ISA; SMBUS; VGA	I2C; ISA; SMBUS; VGA	I2C; ISA; VGA; SMBUS	I2C; ISA; VGA; SMBUS	I2C; ISA; SMBUS; VGA
最大数据传输速率	32000 MBps	32000 MBps	32 MBps	32 MBps	32000 MBps
JESD-30 代码	S-PBGA-B484	S-PBGA-B484	S-PBGA-B484	S-PBGA-B484	S-PBGA-B484
JESD-609代码	e0	e0	e0	e1	e1
长度	23 mm	23 mm	23 mm	23 mm	23 mm
湿度敏感等级	4	4	4	4	4
端子数量	484	484	484	484	484
最高工作温度	70 °C	85 °C	70 °C	70 °C	85 °C
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	BGA	BGA	BGA	BGA	BGA
封装形状	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
峰值回流温度（摄氏度）	225	225	225	245	245
座面最大高度	3.32 mm	3.32 mm	3.32 mm	3.32 mm	3.32 mm
最大供电电压	1.1 V	1.1 V	1.1 V	1.1 V	1.1 V
最小供电电压	0.9 V	0.9 V	0.9 V	0.9 V	0.9 V
标称供电电压	1 V	1 V	1 V	1 V	1 V
表面贴装	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
端子面层	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式	BALL	BALL	BALL	BALL	BALL
端子节距	1 mm	1 mm	1 mm	1 mm	1 mm
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
宽度	23 mm	23 mm	23 mm	23 mm	23 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI

89H32T8G2ZCBL8