Integrated DeviceTechnology
Integrated DeviceTechnology
48-Lane 12-Port PCIe
®
Gen3
System Interconnect Switch
x8/x4/x2/x1
SerDes
DL/Transaction Layer
Route Table
Frame Buffer
DL/Transaction Layer
SerDes
x8/x4/x2/x1
x8/x4/x2/x1
SerDes
DL/Transaction Layer
x8/x4/x2/x1
SerDes
DL/Transaction Layer
Port Arbitration
Scheduler
DL/Transaction Layer
SerDes
x8/x4/x2/x1
POWER MANAGEMENT | ANALOG & RF |
INTERFACE & CONNECTIVITY
| CLOCKS & TIMING | MEMORY & LOGIC | TOUCH & USER INTERFACE | VIDEO & DISPLAY | AUDIO
FEATURES
• High
Performance Non-Blocking
Switch Architecture
– 48-lane 12-port PCIe switch
– Integrated SerDes supports 8.0 GT/s Gen3, 5.0
GT/s Gen2 and 2.5 GT/s Gen1 operation
– Delivers up to 96 GBps (768 Gbps) of
switching capacity
– Low latency cut-through architecture
– Multicast compliant to Spec
– Supports up to 2 KB maximum payload size
– Request metering for maximum system throughput
• Standards
and Compatibility
– PCI Express Base Specification 3.0 compliant
– Implements the following optional
PCI Express features:
- Advanced Error Reporting (AER) on all ports
- Access Control Services (ACS)
- Alternative Routing ID (ARI) ECN
- Internal Error Reporting (IER) ECN
- Atomic operations ECN
- TLP processing hints (TPH) ECN
- Latency Tolerance Reporting (LTR) ECN
- Optimized Buffer Flush/Fill (OBFF) ECN
– PCI Power Management Spec
- Supports D0, D3hot and D3 power
management states
– Active State Power Management (ASPM)
• Switch
Initialization/ Configurability
– Supports x8, x4, x2 and x1 ports
– Automatic per port link width negotiation
– Automatic lane reversal
– Autonomous and software managed link width
and speed control
– Per lane SerDes configuration
– Supports Global and Local reference port clock input
– Crosslink support
– 9 General Purpose I/O
– Supports Root (BIOS, OS, or driver), Serial EEPROM,
pin strapping, or SMBus switch initialization
– No power sequencing requirements
• Multi-Root
Support
– Supports up to 12 fully independent switch partitions
– Configurable downstream port device numbering
– Supports dynamic reconfiguration of switch partitions
– Movable upstream port within and between
switch partitions
• Reliability,
Availability and Serviceability (RAS)
– ECRC support
– AER on all ports
– SECDED ECC protection on all internal RAMs
– End-to-end data path parity protection
– Ability to generate an interrupt (INTx or MSI) on
link up/down transitions
– Hot-plug supported on all downstream switch ports
– On-chip link activity and status outputs available
including the upstream ports
– Supports IEEE 1149.6 AC JTAG and IEEE 1149.1 JTAG
• Development
Tools
– 89KTPES48H12G3 Evaluation Board
– PCIe Browser Software
– Provides ODS (On-Die Scope)
– Built-in PRBS generator and checker
– Documentation and support at:
www.IDT.com
• Packaged
in a 27mm x 27mm 676-ball FCBGA
12-Port Switch Core
DL/Transaction Layer
SerDes
x8/x4/x2/x1
48 PCI Express Lanes - Up to 6 x8 ports or 12 x4 ports
Device Overview
The 89H48H12G3 is a 48-lane, 12-port system interconnect switch optimized for PCI Express
®
Gen3 packet
switching in high-performance applications, supporting multiple simultaneous peer-to-peer traffic flows. Target
applications include servers, storage, communications, embedded systems, and multi-host or intelligent I/O
based systems with inter-domain communication.
Utilizing standard PCI Express Gen3 interconnect, the 89H48H12G3 provides the most efficient system
interconnect switching solution for applications requiring high throughput, low latency, and simple board layout
with a minimum number of board layers. It provides 96 GBps (768 Gbps) of aggregated, full-duplex switching
capacity through 48 integrated serial lanes, using proven and robust IDT technology. Each lane is capable of 8
GT/s of bandwidth in both directions and is fully compliant with PCI Express Base specification 3.0.
Memory
CPU 0
CPU 1
Memory
Storage IO
Gen 3
PCIe Switch
PCIe
Slot
PCIe
Slot
PCIe
Slot
®
Network IO
Network IO
Partition 0
PCIe
Slot
Partition 1
Enterprise Server
SSD-1
SSD-2
SSD-3
SSD-14
Gen 3
PCIe Switch
®
Gen 3
PCIe Retimer
IO Module
®
Cable
to
RC
SSD Storage
SSD Storage Array
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of
product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when
installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied
warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not
intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their
own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners.
© Copyright 2011. All rights reserved.
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|
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IDT89H48H12G3 PRODUCT BRIEF
1
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