NLAS4783
Triple SPDT 1.0
W
R
ON
Switch
The NLAS4783 is a triple independent ultra−low R
ON
SPDT analog
switch with ENABLE. This device is designed for low operating
voltage, high current switching of speaker output for cell phone
applications. It can switch a balanced stereo output. The NLAS4783
can handle a balanced microphone/speaker/ring−tone generator in a
monophone mode. The device contains a break−before−make feature.
Features
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MARKING
DIAGRAM
16
•
•
•
•
•
•
•
•
1.65 to 3.6 V V
CC
Tiny 3 x 3 mm 16−Pin QFN Package
Meets JEDEC MO−220 Specifications
Low Static Power
OVT on Logic Address and Enable Inputs
This is a Pb−Free Device*
Cell Phone Speaker/Microphone Switching
Ringtone−Chip/Amplifier Switching
Three Unbalanced (Single−Ended) Switches
Stereo Balanced (Push−Pull) Switching
QFN−16
CASE 485AE
1
Typical Applications
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Y0
16
Important Information
Y1
15
Vcc
14
•
ESD Protection:
•
•
•
•
Human Body Model (HBM) > 8000 V
Machine Model (MM) > 400 V
Ringtone−Chip/Amplifier Switching
Continuous Current Rating Through each Switch
±300
mA
Conforms to: JEDEC MO−220, Issue H, Variation VEED−6
Pin−for−Pin Compatible with MAX4783
Z1
Z
Z0
ENABLE
1
2
3
4
5
6
NC GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2008
July, 2008
−
Rev. 3
1
Publication Order Number:
NLAS4783/D
ÇÇ
ÇÇ
Y
13
7
8
•
Single Supply Operation
1
NLAS
4783
ALYWG
G
12
11
10
9
X
X1
X0
A
C
B
NLAS4783
X, Y, or Z
X0, Y0, or Z0
ENABLE
LOGIC
A, B, or C
X1, Y1, or Z1
Figure 1. Input Equivalent Circuit
PIN FUNCTION DESCRIPTION
QFN PIN #
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Symbol
Y1
Y0
Z1
Z
Z0
ENABLE
NC
GND
C
B
A
X0
X1
X
Y
V
CC
Analog Switch Y Normally Open Input
Analog Switch Y Normally Closed Input
Analog Switch Z Normally Open Input
Analog Switch Z Output
Analog Switch Z Normally Closed Input
Digital Enable Input. Normally connect to GND. Drive to logic high to set all switches off.
No Connection. Not internally connected.
Ground
Digital Address C Input
Digital Address B Input
Digital Address A Input
Analog Switch X Normally Closed Input
Analog Switch X Normally Open Input
Analog Switch X Output
Analog Switch Y Output
Positive Analog and Digital Supply Voltage Input
Description
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2
NLAS4783
TRUTH TABLE/SWITCH PROGRAMMING
Select Input
Enable Input
H
L
C
X
L
B
X
L
A
X
L
All Switches Open
X−X0
Y−Y0
Z−Z0
X−X1
Y−Y0
Z−Z0
X−X0
Y−Y1
Z−Z0
X−X1
Y−Y1
Z−Z0
X−X0
Y−Y0
Z−Z1
X−X1
Y−Y0
Z−Z1
X−X0
Y−Y1
Z−Z1
X−X1
Y−Y1
Z−Z1
L
L
L
H
L
L
H
L
L
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
L
H
H
H
1. Input and output pins are identical and interchangeable. Both pins can be considered input or output. Bidirectional signal pass.
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3
NLAS4783
MAXIMUM RATINGS
Symbol
V
CC
V
IS
V
IN
I
anl1
I
anl−pk 1
I
clmp
Positive DC Supply Voltage
Analog Input Voltage (V
NO
, V
NC
, or V
COM
)
Digital Select Input Voltage
Continuous DC Current from COM to NC/NO
Peak Current from COM to NC/NO, 10 Duty Cycles (Note 2)
Continuous DC Current into COM/NC/NO with Respect to V
CC
or GND
Parameter
Value
*0.5
to
)4.6
*0.5
to V
CC
*0.5
to
)4.6
$300
$500
$100
Unit
V
V
V
mA
mA
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Defined as 10% ON, 90% off duty cycle.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IS
V
IN
T
A
t
r
, t
f
Positive DC Supply Voltage
Analog Input Voltage (V
NO
, V
NC
, or V
COM
)
Digital Select Input Voltage
Operating Temperature Range
Input Rise or Fall Time, SELECT
V
CC
= 1.6−2.7 V
V
CC
= 3.0−3.6 V
Parameter
Min
1.65
−
−
*40
−
−
Max
3.6
V
CC
V
CC
85
20
10
Unit
V
V
V
°C
ns/V
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4
NLAS4783
DC CHARACTERISTICS
−
Digital Section
(Voltages Referenced to GND)
Guaranteed Limit
Symbol
V
IH
Parameter
Minimum High−Level Input
Voltage, Select Inputs
Maximum Low−Level Input
Voltage, Select Inputs
Maximum Input Leakage
Current, Select Inputs
Power Off Leakage Current
Maximum Quiescent Supply
Current (Note 3)
V
IN
= 3.6 V or GND
V
IN
= 3.6 V or GND
Select and V
IS
= V
CC
or GND
Condition
V
CC
1.65
2.7
3.6
1.65
2.7
3.6
3.6
0
1.65 to 3.6
*405C
to 255C
1.0
1.4
1.8
0.4
0.5
0.6
$
0.1
$0.5
$
1.0
t855C
1.0
1.4
1.8
0.4
0.5
0.6
$
1.0
$2.0
$
2.0
Unit
V
V
IL
V
I
IN
I
OFF
I
CC
mA
mA
mA
DC ELECTRICAL CHARACTERISTICS
−
Analog Section
Guaranteed Maximum Limit
−405C
to 255C
Symbol
R
ON
Parameter
NC/NO On−Resistance
(Note 3)
NC/NO On−Resistance Flatness
(Notes 3, 5)
On−Resistance Match Between Channels
(Notes 3 and 4)
NC or NO Off Leakage Current (Note 3)
Condition
V
IN
v
V
IL
or V
IN
w
V
IH
V
IS
= GND to V
CC
I
IN
I
v
100 mA
I
COM
= 100 mA
V
IS
= 0 to V
CC
V
IS
= 1.3 V;
I
COM
= 100 mA
V
IN
= V
IL
or V
IH
V
NO
or V
NC
= 0.3 V
V
COM
= 3.3 V
V
IN
= V
IL
or V
IH
V
NO
0.3 V or 3.3 V with
V
NC
floating or
V
NC
0.3 V or 3.3 V with
V
NO
floating
V
COM
= 0.3 V or 3.3 V
V
CC
2.7
−
3.6
Min
Max
1.0
t855C
Min
Max
1.2
Unit
W
R
FLAT
DR
ON
I
NC(OFF)
I
NO(OFF)
I
COM(ON)
2.7
−
3.6
2.7
−
3.6
3.6
−5.0
0.2
0.4
5.0
−10
0.2
0.6
10
W
W
nA
COM ON
Leakage Current
(Note 3)
3.6
−10
10
−100
100
nA
3. Guaranteed by design. Resistance measurements do not include test circuit or package resistance.
4.
DR
ON =
R
ON(MAX)
−
R
ON(MIN)
between NC1 and NC2 or between NO1 and NO2.
5. Flatness is defined as the difference between the maximum and minimum value of on−resistance as measured over the specified analog
signal ranges.
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5
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