NJW4182
High Voltage Ultra low current consumption Io=100mA LDO
GENERAL DESCRIPTION
The NJW4182 is a 100mA output Low dropout regulator with high
maximum input voltage, ultra-low current consumption and small package.
Due to the low current consumption, the NJW4182 is suitable
for light load and continuously running applications such as
power management microprocessor, RTC, protection circuit,
security system and so on.
PACKAGE OUTLINE
NJW4182KH1
NJW4182F
FEATURES
Wide Operation Voltage Range
Low Current Consumption
MLCC correspond
Output Current
High Precision Output Voltage
Internal Thermal Overload Protection
Internal Over Current Protection
Package Outline
4.0 to 40V
9μA (typ.)
I
O
(min.)=100mA
V
O
1.0%
NJW4182U3
DFN6-H1(ESON6-H1), SOT-23-5, SOT-89-3
PIN
CONFIGRATION
(Top View)
6
5
4
(Bottom View)
1
2
3
1
2
3
6
5
4
Exposed Pad on backside
connect to GND
1. N.C.
2. GND
3. N.C
4. V
IN
5. N.C
6. V
OUT
5
4
1
2
3
1. N.C.
2. GND
3. N.C
4. V
OUT
5. V
IN
1.V
OUT
2.GND
3.V
IN
1
2
3
NJW4182KH1
BLOCK
DIAGRAM
NJW4182F
NJW4182U3
Ver.2014-09-29
-1-
NJW4182
OUTPUT
VOLTAGE RANK LIST
DFN6-H1(ESON6-H1)
SOT-23-5
Device Name
V
OUT
Device Name
NJW4182KH1-25 2.5V NJW4182F25
NJW4182KH1-33 3.3V NJW4182F33
NJW4182KH1-05 5.0V NJW4182F05
SOT-89-3
V
OUT
Device Name V
OUT
2.5V NJW4182U3-33 3.3V
3.3V NJW4182U3-05 5.0V
5.0V
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYNBOL
Input Voltage
V
IN
Output Voltage
V
OUT
Power Dissipation
P
D
Junction Temperature
Operating Temperature
Storage Temperature
Tj
Topr
Tstg
RATINGS
-0.3 to +45
-0.3 to V
IN
17
450 (*1)
DFN6-H1
(ESON6-H1) 1200 (*2)
480 (*3)
SOT-23-5
650 (*4)
625(*5)
SOT-89-3
2400(*6)
-40 to +150
-40 to +85
-40 to +150
(Ta=25C)
UNIT
V
V
mW
C
C
C
(*1): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. (101.5114.51.6mm: 2Layers with Exposed Pad FR-4)
(*2): Mounted on glass epoxy board based on EIA/JEDEC STANDARD. (101.5114.51.6mm: 4Layers FR-4)
(4Layers inner foil: 99.599.5mm, Applying a thermal via hole to a board based on JEDEC standard JESD51-5)
(*3): Mounted on glass epoxy board based on EIA/JEDEC. (114.376.21.6mm: 2Layers FR-4)
(*4): Mounted on glass epoxy board based on EIA/JEDEC. (114.376.21.6mm: 4Layers FR-4), internal Cu area: 74.2×74.2mm
(*5): Mounted on glass epoxy board. (76.2
114.3
1.6mm:based on EIA/JDEC standard size, 2Layers, Cu area 100mm )
2
(*6): Mounted on glass epoxy board. (76.2
114.3
1.6mm:based on EIA/JDEC standard, 4Layers)
(4Layers inner foil: 74.274.2mm, Applying a thermal via hole to a board based on JEDEC standard JESD51-5)
OPERATION VOLTAGE RANGE
V
IN
= 4.0V to 40V
-2-
Ver.2014-09-29
NJW4182
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
O
3V
:V
IN
=V
O
+1V, C
IN
=1.0µF , C
O
=4.7µF , Ta=25C
V
O
3V
:V
IN
=4V, C
IN
=1.0µF , C
O
=10µF, Ta=25C
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Output Voltage
Quiescent Current
Output Current
Line Regulation
Load Regulation
Dropout Voltage(*7)
Ripple Rejection
V
O
I
Q
Io
V
O
/V
IN
V
O
/I
O
V
IO
RR
I
O
=30mA
I
O
=0mA
V
O
0.9
V
IN
= V
O
+1V to 40V, I
O
=30mA(V
O
3V),
V
IN
= 4V to 40V, I
O
=30mA(V
O
3V)
I
O
=0mA to 100mA
I
O
=60mA
V
IN
= 5V, ein = 50mVrms,
f=1kHz, Io=10mA
V
IN
= V
O
+2V, ein = 50mVrms,
f = 1kHz , Io = 10mA
-1.0%
-
100
-
-
-
-
-
-
-
-
9
-
-
-
0.18
54
52
48
50
+1.0%
18
-
0.05
0.018
0.3
-
-
-
-
V
μA
mA
%/V
%/mA
V
dB
Vo=2.5V
Vo=3.3V
Vo=5.0V
Average Temperature
Coefficient of
Output Voltage
V
O
/Ta
Ta=0 to 85C, I
O
=30mA
ppm/C
(*7): The output voltage excludes under 3.8V.
The above specification is a common specification for all output voltages.
Therefore, it may be different from the individual specification for a specific output voltage.
Ver.2014-09-29
-3-
NJW4182
POWER DISSIPATION vs. AMBIENT TEMPERATURE
NJW4182KH1 Pow erDissipation
(Topr=-40~+85°C,Tj=150°C)
2000
1600
on 4 layers board
1200
800
on 2 layers board
400
0
-50
-25
0
25
50
75
100
125
150
Temperature : Ta(
C
)
NJW4182F PowerDissipation
(Topr=-40~+85°C,Tj=150°C)
800
Power Dissipation P
D
(mW)
700
600
500
400
300
200
100
0
-50
on 4 layers board
on 2 layers board
-25
0
25
50
75
100
125
150
Temperature : Ta(°C)
NJW4182U3 PowerDissipation
(Topr= -40~+85°C,Tj=150°C)
3000
Power Dissipation P
D
(mW)
2500
2000
1500
1000
500
0
-50
on 4 layers board
on 2 layers board
-25
0
25
50
75
100
125
150
Temperature : Ta(°C)
-4-
Ver.2014-09-29
NJW4182
TEST CIRCUIT
A
V
IN
I
IN
V
IN
1.0F
(ceramic)
V
OUT
(*8)
NJW4182
4.7F
(ceramic)
I
OUT
V
V
OUT
(*8) :Vo < 3.0V version : Co=10F(Ceramic)
GND
TYPICAL APPLICATION
V
IN
1.0F
V
IN
V
OUT
(*9)
V
OUT
4.7F
NJW 4182
GND
(*9) :Vo < 3.0V version : Co=10F
Ver.2014-09-29
-5-
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