April 17, 2012
Si4x3x Errata (rev. B)
Errata Status Summary
Errata #
1
Title
Register modification required for
frequency operation from
240–320 MHz and 480–640 MHz.
Incorrect nIRQ signal operation
after shutdown (SDN) or initial
power up.
Current draw may be higher than
expected when in SLEEP mode
when the Low Battery Detection
(LBD) function is ENABLED.
Impact
Minor
Status
Work around is available.
2
Minor
Work around is available
3
Major
Multiple software workarounds are
available.
Impact Definition: Each erratum is marked with an impact, as defined below:
Minor:
Workaround exists.
Major:
Errata that do not conform to the data sheet or standard.
Information:
The device behavior is acceptable the data sheet will be changed to match the
device behavior.
400 West Cesar Chavez, Austin, TX 78701 (512) 416-8500 FAX (512) 416-9669 www.silabs.com
S4x3xB0ER041712
Errata Details
1.
Description:
Register modifications are required for operation in the frequency bands between
240–320 MHz and 480–640 MHz with a temperature above 60 °C.
Impact:
In extremely rare cases, the synthesizer will not lock in these bands when the device is operated at
a temperature above 60 °C. The software workaround is only required for these frequency and
temperature ranges.
Workaround:
Write 03h to register 59h and 02h to register 5Ah.
Resolution:
Software workaround with register modification.
2.
Description:
Incorrect nIRQ signal operation after shutdown (SDN) or initial power up.
Impacts:
In a small percentage of cases after Shutdown (SDN) or initial power up the nIRQ signal can be
low during the Power-on-Reset (POR) period. Typically the nIRQ signal will be high during this period and
will exhibit a high to low transition at the expiration of the POR period. The interrupt status registers in 03h
and 04h will report the correct status of the POR and the nIRQ function is normal after the initial POR
period.
Workaround:
The nIRQ line should not be monitored for POR after SDN or initial power up. The POR
signal is available by default on GPIO0 and GPIO1 and should be monitored as an alternative to nIRQ for
POR. A second potential workaround is also available by running a timer on the microcontroller after SDN
for 26 ms and then reading the interrupt status registers in 03h and 04h to check for POR and chip ready
(XTAL start-up/ready). After the initial interrupt is cleared the operation of the nIRQ pin will be normal.
Resolution:
Will be fixed in the next revision.
3.
Description:
This issue
ONLY
affects SLEEP mode when the low battery detection (LBD) function is
ENABLED (enlbd = 1 in Register 07h). Note that the LBD function is DISABLED by default.
If LBD is ENABLED, approximately 5% of devices will enter into a state that draws more current than
expected in SLEEP mode. Such devices will draw an average current of approximately 350 µA in SLEEP
mode versus the expected 1 µA. These devices will also report an inaccurate battery voltage level in
SLEEP mode.
The cause of the issue has been verified to be the improper reset of the LBD circuitry when in SLEEP
mode.
We strongly recommend all customers affected by this issue to implement one of the software workarounds
described below.
Impact:
Affected devices will draw more current than expected in SLEEP mode which will reduce the
battery life of battery-backed products.
Workaround:
If the low battery detection (LBD) function is not required during SLEEP mode, this issue can
be resolved by ensuring that LBD is DISABLED (enlbd = 0 in Register 07h).
400 West Cesar Chavez, Austin, TX 78701 (512) 416-8500 FAX (512) 416-9669 www.silabs.com
Alternatively, we have verified two software workarounds that allow the battery level to be checked during
SLEEP mode with low current consumption. Complete details and reference code are provided in the
attached Appendix. A summary of each workaround is included below.
Workaround A:
This workaround utilizes the Low Duty Cycle Mode function of the device to periodically
check the battery level. The wake-up timer (WUT) period must be set in conjunction with the LDC mode on
time to 0.5 s for this workaround to function properly. It does not require any intervention by an external
MCU. The average current when using this workaround is 2.5 µA.
Workaround B:
This workaround requires an external MCU to wake up the device and check battery levels
periodically. The average current when using this workaround is dependent on the duty cycle of the wake
up interval. If the interval is set to 500 s, the average current in this mode will be 1 µA.
Resolution:
Implementation of the workarounds described in this document will enable the battery level to
be checked with low current consumption.
The low battery detection (LBD) function is no longer recommended for use in SLEEP mode and will be
removed from the next revision of the Si4x3x data sheet.
400 West Cesar Chavez, Austin, TX 78701 (512) 416-8500 FAX (512) 416-9669 www.silabs.com
Appendix
Workaround A:
This Low Battery Detection using Low Duty Cycle Mode (automatic LBD workaround).
Initialize Chip,
Clear Interrupts
Setup wake-up timer, low duty
cycle mode to 0.5 sec
Enable Low Battery Detect
interrupt
Enable Low Duty Cycle Mode
Low Battery
Detect Interrupt?
N
Y
Indicate Low Battery
Clear Interrupts
400 West Cesar Chavez, Austin, TX 78701 (512) 416-8500 FAX (512) 416-9669 www.silabs.com
Workaround B:
Low Battery Detection Using Wake-Up Timer.
Initialize Chip
Clear Interrupts
Setup wake-up timer to 1
sec. (or desired time)
Enable wake-up timer
interrupts
Go to Sleep Mode
Wake Up
Timer
Interrupt ?
N
Y
Wait for some time
Read Battery Voltage
Battery Voltage <
Low Battery Detect
Threshold?
Y
Indicate Low Battery
N
Clear Interrupts
400 West Cesar Chavez, Austin, TX 78701 (512) 416-8500 FAX (512) 416-9669 www.silabs.com
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