BUK9209-40B
N-channel TrenchMOS logic level FET
Rev. 03 — 15 June 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Q101 compliant
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 185 °C rating
1.3 Applications
12 V loads
Automotive systems
General purpose power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
drain-source
on-state
resistance
Conditions
T
j
≥
25 °C; T
j
≤
185 °C
V
GS
= 5 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
[1]
Min
-
-
-
Typ
-
-
-
Max Unit
40
75
167
V
A
W
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C;
see
Figure 11;
see
Figure 12
-
-
6.2
7.6
7
9
mΩ
mΩ
Nexperia
BUK9209-40B
N-channel TrenchMOS logic level FET
Table 1.
Symbol
E
DS(AL)S
Quick reference data
…continued
Parameter
Conditions
Min
-
Typ
-
Max Unit
242
mJ
Avalanche ruggedness
non-repetitive
I
D
= 75 A; V
sup
≤
40 V;
drain-source
R
GS
= 50
Ω;
V
GS
= 5 V;
avalanche energy T
j(init)
= 25 °C; unclamped
gate-drain charge V
GS
= 5 V; I
D
= 25 A;
V
DS
= 32 V; T
j
= 25 °C;
see
Figure 13
Dynamic characteristics
Q
GD
-
12
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT428 (DPAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9209-40B
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
Type number
BUK9209-40B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 15 June 2010
2 of 14
Nexperia
BUK9209-40B
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 1;
see
Figure 3
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 1
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive
drain-source
avalanche energy
T
mb
= 25 °C
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
40 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
[1]
[2]
[1]
[2]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
185 °C
R
GS
= 20 kΩ
Min
-
-
-15
-
-
-
-
-
-55
-55
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
40
40
15
99
75
70
396
167
185
185
99
75
396
242
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
mJ
T
mb
= 25 °C; t
p
≤
10 µs; pulsed;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
Avalanche ruggedness
[1]
[2]
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
BUK9209-40B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 15 June 2010
3 of 14
Nexperia
BUK9209-40B
N-channel TrenchMOS logic level FET
100
I
D
(A)
75
03no60
120
P
der
(%)
80
03no96
Capped at 75A due to package
50
40
25
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
200
T
mb
(°C)
Fig 1.
Continuous drain current as a function of
mounting base temperature
10
3
I
D
(A)
10
2
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
03no59
Limit R
DSon
= V
DS
/I
D
t
p
= 10
µ
s
100
µ
s
Capped at 75 A due to package
10
1 ms
DC
10 ms
100 ms
1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9209-40B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 15 June 2010
4 of 14
Nexperia
BUK9209-40B
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
Conditions
see
Figure 4
Min
-
Typ
-
Max
0.95
Unit
K/W
R
th(j-a)
-
71.4
-
K/W
1
δ
= 0.5
Z
th(j-mb)
(K/W)
10
−1
0.2
0.1
0.05
0.02
03nk52
10
−2
single shot
P
δ
=
t
p
T
t
p
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9209-40B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 03 — 15 June 2010
5 of 14
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