74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
Rev. 3 — 6 May 2013
Product data sheet
1. General description
The 74AHC2G125 and 74AHCT2G125 are high-speed Si-gate CMOS devices. They
provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input (nOE). A HIGH at nOE causes the output to assume
a high-impedance OFF-state.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AHC2G125DP
74AHCT2G125DP
74AHC2G125DC
74AHCT2G125DC
74AHC2G125GD
74AHCT2G125GD
40 C
to +125
C
XSON8
40 C
to +125
C
VSSOP8
40 C
to +125
C
TSSOP8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
plastic very thin shrink small outline package;
8 leads; body width 2.3 mm
plastic extremely thin small outline package; no
leads; 8 terminals; body 3
2
0.5 mm
Version
SOT505-2
SOT765-1
SOT996-2
Type number
NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
4. Marking
Table 2.
Marking codes
Marking
A25
C25
A25
C25
A25
C25
Type number
74AHC2G125DP
74AHCT2G125DP
74AHC2G125DC
74AHCT2G125DC
74AHC2G125GD
74AHCT2G125GD
5. Functional diagram
2
1A
1Y
6
2
1
1OE
1
EN1
1
6
5
2A
2Y
3
5
2
EN2
mce186
nA
3
nY
7
2OE
mce185
7
nOE
mna227
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one buffer)
6. Pinning information
6.1 Pinning
74AHC2G125
74AHCT2G125
1OE
1
2
3
4
8
7
6
5
V
CC
2OE
1Y
2A
74AHC2G125
74AHCT2G125
1OE
1A
2Y
GND
1
2
3
4
001aaj260
1A
8
7
6
5
V
CC
2OE
1Y
2A
2Y
GND
001aaj261
Transparent top view
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
Fig 5.
Pin configuration SOT996-2 (XSON8)
74AHC_AHCT2G125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2013
2 of 16
NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
6.2 Pin description
Table 3.
Symbol
1OE, 2OE
1A, 2A
GND
1Y, 2Y
V
CC
Pin description
Pin
1, 7
2, 5
4
6, 3
8
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Control
nOE
L
L
H
[1]
Function table
[1]
Input
nA
L
H
X
Output
nY
L
H
Z
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+7.0
+7.0
-
20
25
75
-
+150
250
Unit
V
V
mA
mA
mA
mA
mA
C
mW
V
I
<
0.5
V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
20
-
-
-
75
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
For XSON8 package: above 45
C
the value of P
tot
derates linearly with 2.4 mW/K.
74AHC_AHCT2G125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2013
3 of 16
NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5.0 V
0.5 V
Conditions
Min
2.0
0
0
40
-
-
74AHC2G125
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
100
20
74AHCT2G125
Min
4.5
0
0
40
-
-
Typ
5.0
-
-
+25
-
-
Max
5.5
5.5
V
CC
+125
-
20
V
V
V
C
ns/V
ns/V
Unit
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74AHC2G125
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OH
HIGH-level
V
I
= V
IH
or V
IL
output voltage
I
O
=
50 A;
V
CC
= 2.0 V
I
O
=
50 A;
V
CC
= 3.0 V
I
O
=
50 A;
V
CC
= 4.5 V
I
O
=
4.0
mA; V
CC
= 3.0 V
I
O
=
8.0
mA; V
CC
= 4.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
OZ
I
I
I
CC
OFF-state
V
I
= V
CC
or GND;
output current V
CC
= 5.5 V
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
-
-
-
-
-
-
-
2.0
3.0
4.5
-
-
0
0
0
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
0.25
0.1
1.0
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.8
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
2.5
1.0
10
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.40
3.70
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.55
0.55
10
2.0
40
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
74AHC_AHCT2G125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2013
4 of 16
NXP Semiconductors
74AHC2G125; 74AHCT2G125
Dual buffer/line driver; 3-state
Table 7.
Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
C
I
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
Conditions
Min
-
25
C
Typ
1.5
Max
10
-
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
10
-
Min
10
Max
pF
74AHCT2G125
V
IH
V
IL
V
OH
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
HIGH-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
=
50 A
I
O
=
8.0
mA
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
A
I
O
= 8.0 mA
OFF-state
V
I
= V
CC
or GND;
output current V
CC
= 5.5 V
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
4.4
3.94
-
-
-
-
-
-
4.5
-
0
-
-
-
-
-
-
-
0.1
0.36
0.25
0.1
1.0
1.35
4.4
3.8
-
-
-
-
-
-
-
-
0.1
0.44
2.5
1.0
10
1.5
4.4
3.70
-
-
-
-
-
-
-
-
0.1
0.55
10
2.0
40
1.5
V
V
V
V
A
A
A
mA
V
OL
I
OZ
I
I
I
CC
I
CC
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
C
I
-
1.5
10
-
10
-
10
pF
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; for test circuit see
Figure 8.
Symbol Parameter
74AHC2G125
t
pd
propagation
delay
nA to nY; see
Figure 6
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
[3]
[1]
[2]
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
-
-
-
-
4.7
6.6
3.4
4.8
8.0
11.5
5.5
7.5
1.0
1.0
1.0
1.0
9.5
13.0
6.5
8.5
1.0
1.0
1.0
1.0
11.5
14.5
7.0
9.5
ns
ns
ns
ns
74AHC_AHCT2G125
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 6 May 2013
5 of 16
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