6.5 mΩ, Bi-Directional Battery Switch in Compact WCSP
DESCRIPTION
The SiP32101, SiP32102, and SiP32103 bidirectional
switches feature reverse blocking capability to isolate the
battery from the system. The internal switch has an ultra-low
6.5 mΩ (typ at 3.3 V) on-resistance and operates from a
+2.3 V to +5.5 V input voltage range, making the devices
ideal battery-disconnect switches for high-capacity battery
applications.
The SiP32101, SiP32102, and SiP32103 have slew rate
control, making them ideal in large load capacitor as well as
high-current load switching applications. These devices are
also highly efficient, consuming a mere 10 pA (typ.) current
in shutdown and 15 pA while operating.
The SiP32101 and SiP32103 have an active low enable and
the SiP32102 has an active high enable. They can interface
directly with a low voltage control signal.
The SiP32101, SiP32102, and SiP32103 are available in an
ultra compact 12-Bump, 1.3 mm x 1.7 mm, 0.4 mm pitch
WCSP package with top side lamination. The device
operates over the temperature of -40 °C to +85 °C.
FEATURES
•
•
•
•
•
•
•
•
•
Bi-directional ON and OFF
7 A continuous current capability
Ultra low R
on
, 6.5 mΩ (typ.) at 3.3 V
Wide input voltage, 2.3 V to 5.5 V
Slew rate controlled turn on
Ultra-low quiescent current: 15 pA (SiP32101, SiP32102)
EN pin with integrated pull up or pull down resistor
Available in both logic high and logic low enable options
Compact 12-Bump, 1.3 mm x 1.7 mm x 0.55 mm
WCSP package
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
APPLICATIONS
•
•
•
•
•
•
•
Smartphones and tablets
Digital still / video cameras
Portable meters and test instruments
Communication devices with embedded batteries
Portable medical and healthcare systems
Data storage
Battery bank
TYPICAL APPLICATION CIRCUIT
System
Charging Block
System
Connector
Power Input
Charging
Control
and
Regulator
System
Power Input
Charger Output
Port B
Port A
Slew
Rate
Gate
Drive Logic
LevelShift
SiP32101,
SiP32102
GND
To Battery Pack
EN, EN
Fig. 1 - Typical Application Circuit
ORDERING INFORMATION
PART NUMBER
SiP32101DB-T1-GE1
SiP32102DB-T1-GE1
SiP32102DB-T5-GE1
SiP32103DB-T1-GE1
SiP32101EVB
SiP32102EVB
SiP32103EVB
MARKING
32101
32102
32102
32103
-
-
-
ENABLE
Low enable
High enable
High enable
Low enable
-
-
-
ENABLE PULL RESISTOR
Pull Low
Pull Low
Pull Low
Pull High
-
-
-
PACKAGE
12-Bump, 1.3 mm x 1.7 mm,
0.4 mm pitch
WCSP package
TEMPERATURE
-40 °C to +85 °C
Evaluation Board
-
-
-
Note
• GE1 denotes halogen-free and RoHS-compliant
MARKING
1
A
B
C
2
3
4
FYWL
32101
S15-0598-Rev. G, 30-Mar-15
Document Number: 62617
1
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP32101, SiP32102, SiP32103
www.vishay.com
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
PARAMETER
V
PA
, V
PB
V
EN
Maximum Continuous Switch Current
Maximum Pulse Current
ESD (HBM)
Operating Temperature
Operating Junction Temperature
Storage Temperature
Thermal Resistance (θ
JA
)
b
Power Dissipation (P
D
)
b, c
T
A
= 70 °C
100 μs pulse
CONDITIONS
Reference to GND
Pulse at 1 ms reference to GND
a
Reference to GND
LIMIT
-0.3 to +6
-1.6
-0.3 to +6
7
15
8000
-40 to +85
125
-65 to +150
73
1096
°C/W
mW
°C
A
V
V
UNIT
Notes
a. Negative current injection up to 300 mA.
b. All bumps soldered to 1 inch x 1 inch, 2 oz. copper, 4 layers PC board.
c. Derate 13.7 mW/°C above T
A
= 70 °C.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating/conditions for extended periods may affect device reliability.
SPECIFICATIONS
TEST CONDITIONS UNLESS SPECIFIED
PARAMETER
SYMBOL
V
IN
= V
PA
/V
PB
= 2.3 V to 5.5 V, T
A
= -40 °C to 85 °C
(Typical values are at V
PA
, V
PB
= 4.2 V,
C
PA
, C
PB
= 0.1 μF, T
A
= 25 °C)
V
PA/PB
V
EN
= 0 V (for SiP32101),
V
EN
= V
IN
(for SiP32102),
no load
V
EN
= 0 V (for SiP32103),
no load
Shutdown Current
Internal FET
On-Resistance
Control
EN / EN Input Logic-Low Voltage
c
EN / EN Input Logic-High
EN / EN Pull Resistor
Timing
Output Turn-On Delay Time
Output Turn-On Rise Time
Output Turn-Off Delay Time
Output Turn-Off Fall Time
t
d(on)
t
r
t
d(off)
t
f
V
IN
= 4.2 V, R
L
= 100
Ω,
C
L
= 0.1 μF, T
A
= 25 °C
-
-
-
-
0.5
1
2.4
1
-
-
-
-
ms
Voltage
c
V
IL
V
IH
R
EN
V
PA
/V
PB
= 5.5 V, V
EN
(or V
EN
) = 2.3 V
-
1.4
-
-
-
500
0.4
-
700
V
kΩ
R
DS(on)
V
PA
/V
PB
= 2.3 V, I
L
= 500 mA, T
A
= 25 °C
V
PA
/V
PB
= 3.3 V, I
L
= 500 mA, T
A
= 25 °C
-
-
8
6.5
13
10
mΩ
I
SHDN
V
EN
= V
IN
(for SiP32101),
V
EN
= 0 V (for SiP32102),
no load
MIN.
a
LIMITS
TYP.
b
MAX.
a
UNIT
Power Supply
Operating Voltage
c
2.3
-
-
-
-
0.015
8.2
0.010
5.5
300
15
300
V
nA
μA
nA
Quiescent Current
I
Q
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. For V
IN
outside this range consult typical EN, EN threshold curve.
S15-0598-Rev. G, 30-Mar-15
Document Number: 62617
2
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP32101, SiP32102, SiP32103
www.vishay.com
BUMP CONFIGURATION
1
2
3
4
Vishay Siliconix
A
A1
A2
A3
A4
Port B
Port A
Port B
/EN
B
B1
B2
B3
B4
Port B
Port A
Port B
Port A
C
C1
C2
C3
C4
GND
Port A
Port B
Port A
Top view (solder bumps on bottom)
Fig. 2 -
WCSP12, 1.3 mm x 1.7 mm
BUMP DESCRIPTION
BUMP NUMBER
A1, B1, A3, B3, C3
C1
A2, B2, C2, B4, C4
A4
NAME
PB
GND
PA
EN / EN
FUNCTION
Power port B
Ground
Power port A
Switch enable input,
active low for SiP32101 and SiP32103, active high for SiP32102
FUNCTIONAL BLOCK DIAGRAM
Internal Bias
Circuit
Internal Bias
Circuit
Port A
Port B
Port A
Port B
EN, SiP32101
EN, SiP32102
Slew Rate Gate
Drive
Logic Level Shift
EN, SiP32101
Slew Rate Gate
Drive
Logic Level Shift
SiP32101,
SiP32102
GND
GND
SiP32103
S15-0598-Rev. G, 30-Mar-15
Document Number: 62617
3
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP32101, SiP32102, SiP32103
www.vishay.com
TYPICAL CHARACTERISTICS
(internally regulated 25 °C, unless otherwise noted)
0.24
0.22
I
QPA
/I
QPB
-
Quiescent
Current (nA)
I
QPA
/I
QPB
-
Quiescent
Current (nA)
10.00
Vishay Siliconix
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
2.0
SiP32101, SiP32102
SiP32101, SiP32102
1.00
V
PA
/V
PB
= 5.0 V
0.10
V
PA
/V
PB
= 4.2 V
V
PA
/V
PB
= 2.7 V
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0.01
- 40
- 15
10
35
60
85
V
PA
/V
PB
(V)
Temperature (°C)
Fig. 3 - Quiescent vs. Input Voltage
16
14
V
EN
= 0 V (SiP32103)
Fig. 6 - Quiescent vs. Temperature
16
V
EN
= 0 V (SiP32103)
14
I
QPA
/I
QPB
-
Quiescent
Current (μA)
12
10
8
6
4
2
0
V
PA
/V
PB
= 2.7 V
V
PA
/V
PB
= 4.2 V
V
PA
/V
PB
= 5.0 V
I
QPA
/
IQPB
-
Quiescent
Current (μA)
12
10
8
6
4
2
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
- 40
- 15
V
PA
/V
PB
(V)
10
35
Temperature (°C)
60
85
Fig. 4 - Quiescent vs. Input Voltage
0.12
I
SHDN-PA
/I
SHDN-PB
-
Shutdown
Current (nA)
V
EN
= V
PA
/V
PB
(SiP32101,
SiP32102)
0.10
R
DS
- On-Resistance (mΩ)
10
9
8
7
6
5
4
3
2
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
- 40
Fig. 7 - Quiescent vs. Temperature
I
L
= 0.5 A
V
PA
/V
PB
= 4.2 V
0.08
0.06
0.04
0.02
0.00
V
PA
/V
PB
(V)
- 15
10
35
60
85
Temperature (°C)
Fig. 5 - Shutdown Current vs. Input Voltage
S15-0598-Rev. G, 30-Mar-15
Fig. 8 - On Resistance vs. Temperature
Document Number: 62617
4
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP32101, SiP32102, SiP32103
www.vishay.com
TYPICAL CHARACTERISTICS
(internally regulated 25 °C, unless otherwise noted)
10
I
SHDN-PA
/I
SHDN-PB
-
Shutdown
Current (nA)
Vishay Siliconix
1.15
R
DS(norm)
- Normalized On -Resistance
T
A
= 25 °C
1.1
V
PA
/V
PB
= 2.7 V
V
PA
/V
PB
= 3.3 V
V
PA
/V
PB
= 4.35 V
1.05
1
V
PA
/V
PB
= 5 V
0.1
V
PA
/V
PB
= 4.2
0.01
V
PA
/V
PB
= 2.7 V
V
PA
/V
PB
= 5 V
1
0.001
- 40
- 15
10
35
60
85
Temperature (°C)
0.95
1
2
3
4
I
OUT
(A)
5
6
7
Fig. 9 - Shutdown Current vs.Temperature
10
Fig. 12 - Normalized On Resistance vs. Load Current
0
-2
9
I
PB
/I
PA
- Input Current (nA)
R
DS
- On-Resistance (mΩ)
I
L
= 0.5 A
8
-4
-6
-8
- 10
- 12
- 14
- 16
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
V
PA
/V
PB
(V)
V
PB
/V
PA
= 2.3 V
7
6
5
4
V
PA
/V
PB
(V)
Fig. 10 - On Resistance vs. Input Voltage
Fig. 13 - Reverse Blocking Current (I
RB
) vs. Output Voltage
600
R
/EN
- /EN Pull down / Pull up Resistance (kΩ)
580
560
t
r
- Rise Time (ms)
1.30
V
EN
= 2.3 V
V
PA
/V
PB
= 5.5 V
1.20
V
PA
/V
PB
= 4.2 V
C
L
= 0.1 μF
R
L
= 10 Ω
540
520
500
480
460
440
420
400
- 40
- 15
10
35
60
85
Temperature (°C)
1.10
1.00
0.90
0.80
- 40
- 15
10
35
60
85
Temperature (°C)
Fig. 11 - EN Pull down Resistance vs. Temperature
S15-0598-Rev. G, 30-Mar-15
Fig. 14 - Rise Time vs. Temperature
Document Number: 62617
5
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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