74AC169 4-Stage Synchronous Bidirectional Counter
November 1988
Revised November 1999
74AC169
4-Stage Synchronous Bidirectional Counter
General Description
The AC169 is fully synchronous 4-stage up/down counter.
The AC169 is a modulo-16 binary counter. It features a
preset capability for programmable operation, carry looka-
head for easy cascading and a U/D input to control the
direction of counting. All state changes, whether in count-
ing or parallel loading, are initiated by the LOW-to-HIGH
transition of the Clock.
Features
s
I
CC
reduced by 50%
s
Synchronous counting and loading
s
Built-In lookahead carry capability
s
Presettable for programmable operation
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74AC169SC
74AC169SJ
74AC169MTC
74AC169PC
Package Number
M16A
M16D
MTC16
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
CEP
CET
CP
P
0
–P
3
PE
U/D
Q
0
–Q
3
TC
Description
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input
Parallel Data Inputs
Parallel Enable Input
Up-Down Count Control Input
Flip-Flop Outputs
Terminal Count Output
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009934
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74AC169
Functional Description
The AC169 uses edge-triggered J-K-type flip-flops and
have no constraints on changing the control or data input
signals in either state of the Clock. The only requirement is
that the various inputs attain the desired state at least a
setup time before the rising edge of the clock and remain
valid for the recommended hold time thereafter. The paral-
lel load operation takes precedence over the other opera-
tions, as indicated in the Mode Select Table. When PE is
LOW, the data on the P
0
–P
3
inputs enters the flip-flops on
the next rising edge of the Clock. In order for counting to
occur, both CEP and CET must be LOW and PE must be
HIGH; the U/D input then determines the direction of count-
ing. The Terminal Count (TC) output is normally HIGH and
goes LOW, provided that CET is LOW, when a counter
reaches zero in the Count Down mode or reaches 15 in the
Count Up mode. The TC output state is not a function of
the Count Enable Parallel (CEP) input level. If an illegal
state occurs, the AC169 will return to the legitimate
sequence within two counts. Since the TC signal is derived
by decoding the flip-flop states, there exists the possibility
of decoding spikes on TC. For this reason the use of TC as
a clock signal is not recommended (see logic equations
below).
1. Count Enable
=
CEP •CET • PE
2. Up: TC
=
Q
0
•Q
1
•Q
2
Q
3
•(Up)•CET
3. Down: TC
=
Q
0
• Q
1
•Q
2
•Q
3
•(Down)•CET
Mode Select Table
Action on Rising
PE
L
H
H
H
H
CEP
X
L
L
H
X
CET
X
L
L
X
H
U/D
Clock Edge
X
H
L
X
X
Load (P
n
to Q
n
)
Count Up (Increment)
Count Down (Decrement)
No Change (Hold)
No Change (Hold)
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
State Diagram
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74AC169
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −0.5V
V
I
=
V
CC
+
0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −0.5V
V
O
=
V
CC
+
0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
Junction Temperature (T
J
)
PDIP
140°C
±50
mA
−65°C
to
+150°C
±50
mA
−20
mA
+20
mA
−0.5V
to V
CC
+
0.5V
−20
mA
+20
mA
−0.5V
to V
CC
+
0.5V
−0.5V
to
+7.0V
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (∆V/∆t)
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
125 mV/ns
2.0V to 6.0V
0V to V
CC
0V to V
CC
−40°C
to
+85°C
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
(Note 4)
I
OLD
I
OHD
I
CC
(Note 4)
Maximum Input
Leakage Current
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
4.0
0.002
0.001
0.001
T
A
= +25°C
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
T
A
= −40°C
to
+85°C
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
V
IN
=
V
IL
or V
IH
2.46
3.76
4.76
0.1
0.1
0.1
V
IN
=
V
IL
or V
IH
0.44
0.44
0.44
±1.0
75
−75
40.0
µA
mA
mA
µA
V
I
OL
=
12 mA
I
OL
=
24 mA
I
OL
=
24 mA (Note 2)
V
I
=
V
CC
, GND
V
OLD
=
1.65V Max
V
OHD
=
3.85V Min
V
IN
=
V
CC
or GND
V
I
OUT
=
50
µA
V
I
OH
= −12
mA
I
OH
= −24
mA
I
OH
= −24
mA (Note 2)
V
I
OUT
= −50 µA
V
V
OUT
=
0.1V
or V
CC
−
0.1V
V
V
OUT
=
0.1V
or V
CC
−
0.1V
Units
Conditions
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 4:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
3
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74AC169
AC Electrical Characteristics
V
CC
(V)
Symbol
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Maximum Clock
Frequency
Propagation Delay
CP to Q
n
(PE HIGH or LOW)
Propagation Delay
CP to Q
n
(PE HIGH or LOW)
Propagation Delay
CP to TC
Propagation Delay
CP to TC
Propagation Delay
CET to TC
Propagation Delay
CET to TC
Propagation Delay
U/D to TC
Propagation Delay
U/D to TC
Note 5:
Voltage Range 3.3 is 3.3V
±
0.3V
T
A
= +25°C,
C
L
=
50 pF
Min
75
100
2.5
1.5
2.5
1.5
4.5
3.0
3.5
2.5
3.5
3.0
3.0
2.0
3.5
2.5
2.5
1.5
Typ
118
154
9.5
7.0
10.5
7.5
13.5
9.5
13.5
9.5
11.0
8.0
9.5
7.0
11.0
8.0
10.0
7.0
13.0
10.0
14.5
11.0
18.0
13.0
18.0
13.0
15.0
10.5
12.5
9.0
15.0
10.5
13.5
9.5
Max
T
A
= −40°C
to
+85°C,
C
L
=
50 pF
Min
65
90
2.0
1.5
2.0
1.5
3.5
2.0
3.0
2.0
3.0
2.5
2.5
1.5
3.0
2.0
2.0
1.5
14.5
11.0
16.0
12.0
22.0
14.0
20.5
14.5
16.5
12.0
14.5
10.0
17.0
12.0
15.5
10.5
Max
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
(Note 5)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Voltage Range 5.0 is 5.0V
±
0.5V
AC Operating Requirements
Symbol
t
S
t
H
t
S
t
H
t
S
t
H
t
S
t
H
t
S
t
H
t
W
Parameter
Setup Time, HIGH or LOW
P
n
to CP
Hold Time, HIGH or LOW
P
n
to CP
Setup Time, HIGH or LOW
CEP to CP
Hold Time, HIGH or LOW
CEP to CP
Setup Time, HIGH or LOW
CET to CP
Hold Time, HIGH or LOW
CET to CP
Setup Time, HIGH or LOW
PE to CP
Hold Time, HIGH or LOW
PE to CP
Setup Time, HIGH or LOW
U/D to CP
Hold Time, HIGH or LOW
U/D to CP
CP Pulse Width,
HIGH or LOW
Note 6:
Voltage Range 3.3 is 3.3V
±
0.3V
V
CC
(V)
(Note 6)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
T
A
= +25°C,
C
L
=
50 pF
Typ
3.0
1.5
−1.5
−0.5
7.5
4.5
−4.5
−2.0
7.0
4.0
−6.0
−4.0
3.5
2.0
−3.5
−1.5
7.0
4.5
−7.0
−4.0
2.0
2.0
4.5
2.5
0.5
1.5
10.5
7.0
0
0.5
10.0
6.5
0
0.5
5.5
3.5
0
0.5
10.0
6.5
0
0.5
3.0
3.0
T
A
= −40°C
to
+85°C,
C
L
=
50 pF
Guaranteed Minimum
5.0
2.5
0.5
1.5
12.5
8.0
0
1.0
12.0
8.0
0
1.0
6.5
4.0
0
0.5
11.5
7.5
0
0.5
4.0
3.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Voltage Range 5.0 is 5.0V
±
0.5V
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
60.0
Units
pF
pF
V
CC
=
OPEN
V
CC
=
5.0V
Conditions
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4
74AC169
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 1.150” Narrow Body
Package Number M16A
5
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