TrilithIC
Data Sheet
1
1.1
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Overview
Features
BTS 7750 G
Quad D-MOS switch driver
Free configurable as bridge or quad-switch
Optimized for DC motor management applications
Low
R
DS ON
: 70 mτ high-side switch, 45 mτ low-
side switch (typical values @ 25
C)
Maximum peak current: typ. 12 A @ 25
C=
Very low quiescent current: typ. 5
←A
@ 25
C=
Small outline, enhanced power P-DSO-package
Full short-circuit-protection
Operates up to 40 V
Status flag diagnosis
Overtemperature shut down with hysteresis
Internal clamp diodes
Isolated sources for external current sensing
Under-voltage detection with hysteresis
PWM frequencies up to 1 kHz
Ordering Code
Q67007-A9401
P-DSO-28-14
Type
BTS 7750 G
1.2
Description
Package
P-DSO-28-14
The
BTS 7750 G
is part of the
TrilithIC
family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated leadframes. The sources are connected
to individual pins, so the
BTS 7750 G
can be used in H-bridge- as well as in any other
configuration. Both the double high-side and the two low-side switches of the
BTS 7750 G
are manufactured in
SMART SIPMOS
®
technology which combines low
R
DS ON
vertical DMOS power stages with CMOS control circuitry. The high-side switch is
fully protected and contains the control and diagnosis circuitry. Also the low-side
switches are fully protected, the equivalent standard product is the
BSP 78.
In contrast to the
BTS 7750 GP,
which consists of the same chips in an
P-TO263-15
package, the
P-DSO-28-14
package offers a smaller outline and a lower price for
applications, which do not need the thermal properties of the
P-TO263-15.
Data Sheet
1
2001-02-01
BTS 7750 G
1.3
Pin Configuration
(top view)
DL1 1
IL1 2
DL1 3
LS-Leadframe
N.C. 4
DHVS 5
GND 6
IH1 7
HS-Leadframe
ST 8
IH2 9
DHVS 10
N.C. 11
LS-Leadframe
DL2 12
IL2 13
DL2 14
28 DL1
27 SL1
26 SL1
25 DL1
24 DHVS
23 SH1
22 SH1
21 SH2
20 SH2
19 DHVS
18 DL2
17 SL2
16 SL2
15 DL2
Figure 1
Data Sheet
2
2001-02-01
BTS 7750 G
1.4
Pin No.
Pin Definitions and Functions
Symbol
DL1
IL1
N.C.
DHVS
GND
IH1
ST
IH2
N.C.
DL2
IL2
SL2
SH2
SH1
SL1
Function
Drain of low-side switch1, leadframe 1
1)
Analog input of low-side switch1
not connected
Drain of high-side switches and power supply voltage,
leadframe 2
1)
Ground
Digital input of high-side switch1
Status of high-side switches; open Drain output
Digital input of high-side switch2
not connected
Drain of low-side switch2, leadframe 3
1)
Analog input of low-side switch2
Source of low-side switch2
Source of high-side switch2
Source of high-side switch1
Source of low-side switch1
1, 3, 25, 28
2
4
5, 10, 19, 24
6
7
8
9
11
12, 14, 15, 18
13
16,17
20,21
22,23
26,27
1)
To reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe.
Pins written in
bold type
need power wiring.
Data Sheet
3
2001-02-01
BTS 7750 G
1.5
Functional Block Diagram
DHVS
5,10,19,24
8
ST
Diagnosis
Biasing and Protection
IH1
7
IH2
GND
9
Driver
IN OUT
0 0 L L
0 1 L H
1 0 H L
1 1 H H
R
O1
R
O2
20,21
12,14,15,18
SH2
DL2
6
22, 23
SH1
DL1
Protection
1,3,25,28
2
IL1
Gate
Driver
Protection
13
IL2
Gate
Driver
26, 27
16, 17
SL1
SL2
Figure 2
Block Diagram
Data Sheet
4
2001-02-01
BTS 7750 G
1.6
Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel
vertical power-MOS-FETs.
Output Stages
The output stages consist of an low
R
DS ON
Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection
The outputs are protected against
– output short circuit to ground
– output short circuit to the supply voltage, and
– overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-
Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
The fully protected low-side switches have no status output.
Overtemperature Protection
The high-side and the low-side switches also incorporate an overtemperature protection
circuit with hysteresis which switches off the output transistors. In the case of the high-
side switches, the status output is set to low.
Undervoltage-Lockout (UVLO)
When
V
S
reaches the switch-on voltage
V
UVON
the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage
V
S
drops below
the switch off value
V
UVOFF.
Data Sheet
5
2001-02-01
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