UAS3LK
32Gb/s Broadband3V Driver Amplifier
Features
• 3V Output
• 20 dB gain (adjustable)
• Hermetic* SMT Package
7X7x1.8mm
• Minimal external passives**
• ECCN 5A991b
Application
The UAS3LK is intended for test
and measurement applications using
simple NRZ or complex modulation
schemes. As a general purpose gain
block with flat, broadband gain, the
UAS3LK is also ideal for commercial
microwave radio and military electronic
warfare systems.
Description
The UAS3LK is a small, single channel, two stage, high-performance broadband
32 Gb/s amplifier with low jitter, 3V amplitude and 20dB gain. Integrated bias-Ts decouple
high frequency signals down to 10MHz; external inductors can be used to extend operation
to lower frequencies. The amplifier stages are fabricated in a production 0.15um GaAs pHEMT
process. The UAS3LK features adjustable gain and is housed in a hermetically sealed,
ceramic package designed for surface mount application to printed circuit boards.
The UAS3LK is RoHS compliant.
SMD-00215 Rev D
Subject to Change Without Notice
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UAS3LK
Key Characteristics:
Vd1=Vd2=5.0V +/- 5%, Zo=50Ω,
Vg1 and Vg2 adjusted to obtain Id1=Id2=90mA respectively with no input signal applied
Values as measured on Microsemi P495r1 evaluation board (includes PCB loss & blocking capacitors)
Parameter
S21 (dB)
Description
Forward Gain
1MHz - 10GHz
10 - 20GHz
20 - 30GHz
S11 (dB)
Input Return Loss
1MHz - 10GHz
10 - 20GHz
20 - 30GHz
S22 (dB)
Output Return Loss
1MHz - 10GHz
10 - 20GHz
20 - 30GHz
Pout
Output Power w/Vin=200mV
1MHz - 10GHz
10 - 16GHz
Psat
Output Power w/Vin=650mV
1MHz - 10GHz
10 - 16GHz
8.5
9
16
16
10
10
16.5
16.5
-
-
-
-
-
-
-
-15
-13
-12
-12
-10
-8
-
-
-
-15
-14
-10
-12
-10
-6
19
18
17
21
20
19
-
-
-
Min
Typ
Max
SMD-00215 Rev D
Subject to Change Without Notice
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UAS3LK
Physical Characteristics
Package Marking:
UAS3LK Part Number
YY
Assembly lot year
WW
Assembly lot week
LOT
Assembly lot number
All measurements in mm.
Tolerances: +/- 0.15 mm
Caution, ESD Sensitive. Unpack and handle only in an ESD-safe environment
Table 1: DC & RF Pin Description
Pin #
1,6,8,10,12,17,19,21
2
Pin Name
GND
VD2_AUX
NC
VD1
VD1_AUX
RF_IN
VG1
VB1
VG2
VB2
RF_OUT
VD2
GND
Description
Package Ground
Drain Bypass, 2nd Stage (typically leave open)
No Connect
Drain Bias, 1st Stage
Drain Bypass, 1st Stage (typically leave open)
RF Input (DC coupled)
1st Gate Bias, 1st Stage
2nd Gate Bias, 1st Stage(typically leave open)
1st Gate Bias, 2nd Stage
2nd Gate Bias, 2nd Stage(typically leave open)
RF Output (DC coupled)
Drain Bias, 2nd Stage
Package Ground
Pin Labeling
3,7,11,15
4
5
9
13
14
16
18
20
22
Paddle
SMD-00215 Rev D
Subject to Change Without Notice
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