End of Life. Last Available Purchase Date is 31-Dec-2014
Si9730
Vishay Siliconix
Dual-Cell Lithium Ion Battery Control IC
DESCRIPTION
The Si9730 monitors the charging and discharging of dual-
cell lithium-ion battery packs (carbon or coke chemistry)
ensuring that battery capacity is fully utilized while ensuring
safe operation. The Si9730 provides protection against over-
charge, over-discharge, and short circuit conditions which
are hazardous to the battery and the environment.
Battery voltages of each individual cell are monitored at the
center-tap connection by an internal A/D converter through
the V
C
pin. If one or both of the cells is determined to be
overcharged, an internal cell balancing network "bleeds" off
current at 15 µA until both cells are charged to the same
maximum level. Depending on the condition of each cell, the
Si9730 will switch two external source-connected N-Channel
MOSFETs on or off to allow the cells to be charged or to pro-
vide current to the load.
The Si9730 is available in an 8-pin SOIC package with an
operating temperature range of - 25 to 85 °C. The Si9730 is
available in both standard and lead (Pb)-free packages.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Over-Charge Protection
Over-Discharge Protection
Short Circuit Current Limiting
Battery Open-Circuit Center Tap Protection
Cell Voltage Balancing
Undervoltage Lockout
Individual Cell Voltage Monitoring
Low Operating Current (30 µA) and Shutdown Current
(1 µA)
Internal N-Channel MOSFET Driver
High Noise Immunity
Accurate (± 1.19 %) Over-Charge Voltage Detection
Four Different Cell Types Covered
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
C
V
DD
Undervoltage
Lockout
+
V
C1
−
Cell Balancing
Network
Timer
A/D
Converter
Control
Logic
C
DELAY
Time Out
CLK
V
C
OUT
+
V
C2
−
Oscillator
1.2 V
REF
V
SS
S
OUT
V
SS
DCO
I
LIMIT
V
M
GS Generator
I
S
V
M
Document Number: 70658
S-40135-Rev. F, 16-Feb-04
www.vishay.com
1
Si9730
End of Life. Last Available Purchase Date is 31-Dec-2014
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
V
M
V
DD
V
C
I
S
Maximum Operating Junction Temperature
Power Dissipation
Thermal Impedance (P
JA
)
Storage Temperature
(V
SS
V
M
)
(V
M
V
SS
)
Limit
V
DD
- 1.5 V to V
DD
+ 15 V
V
SS
- 0.3 V to V
SS
+ 12 V
V
SS
- 0.3 V to V
DD
+ 0.3 V
V
M
- 0.3 V to V
DD
+ 0.3 V
V
SS
- 0.3 V to V
DD
+ 0.3 V
125
200
80
- 55 to 150
Unit
V
°C
mW
°C/W
°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Parameter
C
VC
< 10 pF from V
C
to V
DD
and V
SS
, Total
C
D
R
IS
series resistance to sense resistor
DCO Load Capacitance
V
DD
to V
SS
V
DD
to V
M
Operating Temperature Range
Limit
Open to 1.0
< 27
0 to 2000
9
12
- 25 to 85
Unit
µF
k
pF
V
°C
SPECIFICATIONS
Parameter
Power Supply
Supply Current, Charging Operation
Supply Current, Normal Operation
Undervoltage Lockout Threshold
V
M
Leakage Current
V
M
Operating Current
Control Logic
DCO Output High Voltage
DCO Rise Time (10 % to 80 %)
DCO Fall Time (80 % to 10 %)
V
OH
t
r
t
f
V
OL
I
OH
= - 10 µA, V
C1
= V
C2
= 3.3 V
V
DD
- V
M
= 6.6 V
V
C1
= 2 V, V
C2
= 2.4 V
V
DD
- V
M
= 8.4 V C
L
= 500 pF, DCO to V
SS
V
M
= V
DD
V
C1
= 2 V, V
C2
= 2.4 V
V
M
= V
SS
V
C1
= V
C2
= 4.4 V, I
S
= V
DD
V
DD
- 0.1
7.5
1
V
SS
+ 0.4
V
V
M
+ 0.52
V
µs
Symbol
Test Conditions
Unless Otherwise Specified
Limits
T
A
= - 25 to 85 °C
Min
I
DD_C
I
DD
I
DD_UVL
V
UVL
I
VM_UVL
I
VM
V
C1
= V
C2
= 2.6 V, V
DD
- V
M
= 8.4 V
V
C1
= V
C2
= 4.05 V, V
M
= V
SS
V
M
= V
DD
, V
C1
= V
C2
= 1.7 V
Measured at V
DD
- V
SS
(Falling)
V
C1
= V
C2
, V
DD
- V
M
= 5.5 V
V
C1
= V
C2
= 1.7 V, V
DD
= V
M
V
C1
= V
C2
= 2.6 V, V
DD
- V
M
= 8.4 V
a
Unit
a
Typ
b
Max
60
30
1
µA
3.5
3.7
4.0
1
30
V
µA
DCO Output Low Voltage
I
OL
= 10 µA
Analog Section
Current-Limit
Comparator Trip Point
Current-Limit
Comparator Temperature Coefficient
Current-Limit
Comparator Response Time
Current Limit
Comparator Input Bias Current
V
ILIMIT
dV
ILIMIT
/dT
t
ILIMIT
I
IS
V
C1
= V
C2
= 3.3 V, V
M
= V
SS
+ 0.25 V
C
L
= 50 pF, DCO to V
SS
, See Figure 2
V
C1
= V
C2
= 3.3 V, V
DD
= V
M
, V
IS
= V
SS
- 125
V
C1
= V
C2
= 4.05 V, V
M
= V
SS
+ 0.25 V
I
S
Rising, T
A
= 25 °C
25.5
28
0.18
25
32
mV
%/°C
µs
nA
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2
Document Number: 70658
S-40135-Rev. F, 16-Feb-04
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9730
Vishay Siliconix
SPECIFICATIONS
Parameter
Analog Section (cont’d)
V
OC1
Cell 1
A
Suffix
V
OC2
Cell 2
V
OC1
Cell 1
B
Suffix
V
OC2
Cell 2
Over-Charge Detect
Threshold (Rising)
V
OC1
Cell 1
C
Suffix
V
OC2
Cell 2
V
OC1
Cell 1
D
Suffix
V
OC2
Cell 2
Over-Charge Threshold Difference
Cell 1
Over-Charge Detect
c
Threshold Hysteresis
Cell 2
Cell 1
Over-Discharge Detect
Threshold (Falling)
Cell 2
Cell 1
Cell Balancing Current
Cell 2
Timer Charge Current
Timer Discharge Current
DL2 Time (Over-Charge)
DL2 Time (Over-Discharge)
External Short Circuit Sense Current
Reset Threshold
Center Tap, Average Bias Current
Overcharge Load Detect
Power-Down Charger Detect
Threshold
V
C1
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C1
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C1
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C1
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
- V
M
= 8.6 V
V
C2
= 4.05 V
V
DD
- V
M
= 8.6 V
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= - 25 °C
T
A
= 85 °C
4.15
4.1
4.1
4.15
4.1
4.1
4.2
4.15
4.15
4.2
4.15
4.15
4.18
4.12
4.12
4.18
4.12
4.12
4.28
4.22
4.22
4.28
4.22
4.22
4.20
4.25
4.27
4.27
4.25
4.27
4.27
4.30
4.32
4.32
4.30
4.32
4.32
4.25
4.30
4.25
4.25
4.30
4.25
4.35
4.40
4.35
4.35
4.40
4.35
20
10
10
2.3
2.3
30
30
Symbol
Test Conditions
Unless Otherwise Specified
Limits
T
A
= - 25 to 85 °C
Min
a
Unit
Typ
b
Max
a
4.20
4.25
4.25
4.22
V
4.22
4.32
4.32
|V
OC1
- V
OC2
|
V
OC_H1
V
C2
= 4.05 V
V
DD
- V
M
= 8 6 V
V
OC_H2
V
C1
= 4.05 V
V
ODC1
V
C2
= 2.6 V
V
ODC2
V
C1
= 2.6 V
V
M
= V
SS
V
C1
= 4.4 V, V
C2
= 4.05 V
I
BAL1
I
BAL2
V
C2
= 4.4 V, V
C1
= 4.05 V
V
C2
= 3.3 V, V
M
= V
SS
I
TIMER(C)
V
C
= V
SS
, T
A
= 25 °C
I
TIMER(D)
t
DL2OC
t
DL2ODC
I
VMSHORT
V
RTH
I
VC
t
OCC
V
CHPD
V
C1
= V
C2
= 3.3 V, V
DD
= V
M
V
DD
- V
C
= 6.1 V, T
A
= 25 °C
V
C1
= 4.05 V, V
DD
- V
M
= 10 V
CD = 500 pF, T
A
= 25 °C, See Figure 4
V
C1
= 2.6 V, V
M
= V
SS
, CD = 500 pF
T
A
= 25 °C, See Figure 5
V
C1
= V
C2
= 4.4 V, V
M
= V
DD
V
C1
= V
C2
= 4.05 V, See Figure 3
V
C1
= V
C2
= 4.05 V, V
M
= V
DD
V
C1
= V
C2
= 4.4 V, CD = 500 pF
C
L
= 500 pF, DCO to V
SS
, See Figure 1
V
C1
= 2 V, V
C2
= 2.4 V, See Figure 6
mV
2.1
2.1
9
9
2.2
2.2
15
15
- 0.5
1.0
V
µA
mA
60
ms
60
300
100
2
40
1.1
µA
mV
µA
µs
V
µs
27
27
30
42
-2
40
40
60
C
L
= 500 pF, DCO to V
SS
, See Figure 7
t
PW
DCO Pulse Width
Notes:
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. Guaranteed by design, not subject to production test.
520
Document Number: 70658
S-40135-Rev. F, 16-Feb-04
www.vishay.com
3
Si9730
End of Life. Last Available Purchase Date is 31-Dec-2014
Vishay Siliconix
TIMING DIAGRAMS
200 mV
V
M
Waveform
50 %
V
SS
t
r
100 nS
High
DCO Waveform
V
SS
t
OCC
50 %
Figure 1. OC Load Detect
I
S
Input
50 %
V
SS
V
DD
DCO Waveform
V
SS
50 %
t
ILIMIT
60 mV
t
r
100 nS
V
M
Waveform
(After Short is
Removed)
V
DD
V
SS
V
RTH
V
DD
DCO Waveform
V
SS
V
RTH
= V
M
- V
SS
at DCO Transition
Figure 2. Current-Limit Comparator Response Time
Figure 3. Reset Threshold
4.4 V
V
C2
Waveform
4.0 V
t
30
C Waveform
V
SS
t
DL20C
=
32
x t
30
30
1
31
2.6 V
V
C2
Waveform
2.0 V
t
30
C Waveform
V
SS
t
DL20DC
=
32
x t
30
30
1
31
Figure 4. DL2 Time (Over-Charge)
Figure 5. DL2 Time (Over-Discharge)
V
SS
V
M
Waveform
+
V
CHPD
−
V
M
Waveform
V
SS
High
^V
RTH
DCO Waveform
Low
V
CHPD
= V
SS
- V
M
at DCO Transition
DCO Waveform
t
pw
V
DD
V
SS
Figure 6. Power-Down Charger Detect Threshold
Figure 7. Load Detection in Overcharge Mode
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4
Document Number: 70658
S-40135-Rev. F, 16-Feb-04
End of Life. Last Available Purchase Date is 31-Dec-2014
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