PD - 95550A
IRFR4105PbF
IRFU4105PbF
Ultra Low On-Resistance
l
Surface Mount (IRFR4105)
l
Straight Lead (IRFU4105)
l
Fast Switching
l
Fully Avalanche Rated
l
Lead-Free
Description
l
HEXFET
®
Power MOSFET
D
V
DSS
= 55V
G
S
R
DS(on)
= 0.045Ω
I
D
= 27A
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D-PAK
TO-252AA
I-PAK
TO-251AA
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
27
19
100
68
0.45
± 20
65
16
6.8
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
Typ.
–––
–––
–––
Max.
2.2
50
110
Units
°C/W
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1
1/7/05
IRFR/U4105PbF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
Conditions
55
––– –––
V
V
GS
= 0V, I
D
= 250µA
––– 0.052 ––– V/°C Reference to 25°C, I
D
= 1mA
––– ––– 0.045
V
GS
= 10V, I
D
= 16A
2.0
––– 4.0
V
V
DS
= V
GS
, I
D
= 250µA
6.5
––– –––
S
V
DS
= 25V, I
D
= 16A
––– ––– 25
V
DS
= 55V, V
GS
= 0V
µA
––– ––– 250
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
––– ––– 100
V
GS
= 20V
nA
––– ––– -100
V
GS
= -20V
––– ––– 34
I
D
= 16A
––– ––– 6.8
nC
V
DS
= 44V
––– ––– 14
V
GS
= 10V, See Fig. 6 and 13
–––
7.0 –––
V
DD
= 28V
–––
49 –––
I
D
= 16A
ns
–––
31 –––
R
G
= 18Ω
–––
40 –––
R
D
= 1.8Ω, See Fig. 10
Between lead,
–––
4.5
–––
nH
6mm (0.25in.)
G
from package
––– 7.5 –––
and center of die contact
––– 700 –––
V
GS
= 0V
––– 240 –––
pF
V
DS
= 25V
––– 100 –––
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 27
showing the
A
G
integral reverse
––– ––– 100
p-n junction diode.
S
––– ––– 1.6
V
T
J
= 25°C, I
S
= 16A, V
GS
= 0V
––– 57
86
ns
T
J
= 25°C, I
F
= 16A
––– 130 200
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
= 25V, starting T
J
= 25°C, L = 410µH
R
G
= 25Ω, I
AS
= 16A. (See Figure 12)
Pulse width
≤
300µs; duty cycle
≤
2%
Calculated continuous current based on maximum allowable junction
temperature; Package limitation current = 20A
This is applied for I-PAK, Ls of D-PAK is measured between lead and
I
SD
≤
16A, di/dt
≤
420A/µs, V
DD
≤
V
(BR)DSS
,
center of die contact
T
J
≤
175°C
Uses IRFZ34N data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
2
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IRFR/U4105PbF
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
1000
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
10
10
4.5V
4.5V
1
1
0.1
0.1
20µs PULSE WIDTH
T
C
= 25°C
1
10
A
100
0.1
0.1
20µs PULSE WIDTH
T
C
= 175°C
1
10
100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
100
2.4
I
D
= 26A
I
D
, Drain-to-Source Current (A)
2.0
T
J
= 25°C
T
J
= 175°C
1.6
10
1.2
0.8
0.4
ction
1
4
5
6
7
V
DS
= 25V
20µs PULSE WIDTH
8
9
10
A
0.0
-60 -40 -20
0
20
40
60
V
GS
= 10V
80 100 120 140 160 180
A
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRFR/U4105PbF
1200
20
1000
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
iss
C
oss
= C
ds
+ C
gd
I
D
= 16A
V
DS
= 44V
V
DS
= 28V
16
C, Capacitance (pF)
800
C
oss
600
12
8
400
C
rss
200
4
0
1
10
100
A
0
0
10
20
FOR TEST CIRCUIT
SEE FIGURE 13
30
40
A
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
I
D
, Drain Current (A)
100
10µs
T
J
= 175°C
T
J
= 25°C
100µs
10
1ms
10
1
0.4
0.8
1.2
1.6
V
GS
= 0V
A
1
1
T
C
= 25°C
T
J
= 175°C
Single Pulse
10
2.0
A
100
V
SD
, Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRFR/U4105PbF
30
LIMITED BY PACKAGE
25
V
DS
V
GS
R
G
R
D
D.U.T.
+
I
D
, Drain Current (A)
20
-
V
DD
5.0V
15
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
10
Fig 10a.
Switching Time Test Circuit
V
DS
90%
5
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( °C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.05
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
0.1
0.02
0.01
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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