74ALVT16827
20-bit buffer/line driver; non-inverting; 3-state
Rev. 03 — 2 June 2005
Product data sheet
1. General description
The 74ALVT16827 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive. It is designed for V
CC
operation
at 2.5 V or 3.3 V with I/O compatibility to 5 V.
The 74ALVT16827 20-bit buffers provide high performance bus interface buffering for wide
data/address paths or buses carrying parity. They have NOR Output Enables (nOE1 and
nOE2) for maximum control flexibility.
2. Features
s
s
s
s
s
s
s
Multiple V
CC
and GND pins minimize switching noise
5 V I/O compatible
Live insertion and extraction permitted
3-state output buffers
Power-up 3-state
Output capability: +64 mA and
−32
mA
Latch-up protection:
x
JESD 78 exceeds 500 mA
s
ElectroStatic Discharge (ESD) protection:
x
MIL STD 883 Method 3015: exceeds 2000 V
x
Machine model: exceeds 200 V
s
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C.
Symbol Parameter
t
PLH
t
PHL
C
I
Conditions
Min
1.0
0.7
1.0
0.8
-
Typ
2.0
1.5
2.0
1.6
3
Max
2.9
2.2
3.0
2.3
-
Unit
ns
ns
ns
ns
pF
propagation delay nAx C
L
= 50 pF; V
CC
= 2.5 V
to nYx
C
L
= 50 pF; V
CC
= 3.3 V
propagation delay nAx C
L
= 50 pF; V
CC
= 2.5 V
to nYx
C
L
= 50 pF; V
CC
= 3.3 V
input capacitance on
DIR, OE
V
I
= 0 V or V
CC
Philips Semiconductors
74ALVT16827
20-bit buffer/line driver; non-inverting; 3-state
Table 1:
Quick reference data
…continued
GND = 0 V; T
amb
= 25
°
C.
Symbol Parameter
C
O
I
CC
output capacitance
total supply current
Conditions
V
I/O
= 0 V or V
CC
outputs disabled;
V
CC
= 2.5 V
outputs disabled;
V
CC
= 3.3 V
Min
-
-
-
Typ
9
40
70
Max
-
-
-
Unit
pF
µA
µA
4. Ordering information
Table 2:
Ordering information
Package
Temperature
range
74ALVT16827DL
Name
Description
plastic shrink small outline package; 56 leads; body width
7.5 mm
Version
SOT371-1
SOT364-1
Type number
−40 °C
to +85
°C
SSOP56
74ALVT16827DGG
−40 °C
to +85
°C
TSSOP56 plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
5. Functional diagram
1
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
&
&
EN1
EN2
2
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
27
55
54
52
51
49
48
47
45
44
43
1
1
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9
1
56
1OE0
1OE1
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9
2
42
3
41
5
40
6
38
8
37
9
36
10
34
12
33
13
31
14
30
1
2
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9
28
29
2OE0
2OE1
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9
15
16
17
19
20
21
23
24
26
27
001aad056
001aad055
Fig 1. Logic symbol
Fig 2. IEC logic symbol
9397 750 15122
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 2 June 2005
2 of 16
Philips Semiconductors
74ALVT16827
20-bit buffer/line driver; non-inverting; 3-state
nA0
nA1
nA2
nA3
nA4
nA5
nA6
nA7
nA8
nA9
nOE0
nOE1
nY0
nY1
nY2
nY3
nY4
nY5
nY6
nY7
nY8
nY9
001aad061
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
1OE0
1Y0
1Y1
GND
1Y2
1Y3
V
CC
1Y4
1Y5
1
2
3
4
5
6
7
8
9
56 1OE1
55 1A0
54 1A1
53 GND
52 1A2
51 1A3
50 V
CC
49 1A4
48 1A5
47 1A6
46 GND
45 1A7
44 1A8
43 1A9
42 2A0
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 2A5
35 V
CC
34 2A6
33 2A7
32 GND
31 2A8
30 2A9
29 2OE1
001aad054
1Y6 10
GND 11
1Y7 12
1Y8 13
1Y9 14
2Y0 15
2Y1 16
2Y2 17
GND 18
2Y3 19
2Y4 20
2Y5 21
V
CC
22
2Y6 23
2Y7 24
GND 25
2Y8 26
2Y9 27
2OE0 28
16827
Fig 4. Pin configuration
9397 750 15122
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 2 June 2005
3 of 16
Philips Semiconductors
74ALVT16827
20-bit buffer/line driver; non-inverting; 3-state
6.2 Pin description
Table 3:
Symbol
1OE0
1Y0
1Y1
GND
1Y2
1Y3
V
CC
1Y4
1Y5
1Y6
GND
1Y7
1Y8
1Y9
2Y0
2Y1
2Y2
GND
2Y3
2Y4
2Y5
V
CC
2Y6
2Y7
GND
2Y8
2Y9
2OE0
2OE1
2A9
2A8
GND
2A7
2A6
V
CC
2A5
2A4
2A3
GND
9397 750 15122
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Description
output enable input (active-LOW)
data output
data output
ground (0 V)
data output
data output
positive voltage supply
data output
data output
data output
ground (0 V)
data output
data output
data output
data output
data output
data output
ground (0 V)
data output
data output
data output
positive voltage supply
data output
data output
ground (0 V)
data output
data output
output enable input (active-LOW)
output enable input (active-LOW)
data input
data input
ground (0 V)
data input
data input
positive voltage supply
data input
data input
data input
ground (0 V)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 2 June 2005
4 of 16
Philips Semiconductors
74ALVT16827
20-bit buffer/line driver; non-inverting; 3-state
Pin description
…continued
Pin
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Description
data input
data input
data input
data input
data input
data input
ground (0 V)
data input
data input
data input
positive voltage supply
data input
data input
ground (0 V)
data input
data input
output enable input (active-LOW)
Table 3:
Symbol
2A2
2A1
2A0
1A9
1A8
1A7
GND
1A6
1A5
1A4
V
CC
1A3
1A2
GND
1A1
1A0
1OE1
7. Functional description
7.1 Function table
Table 4:
Input
nOEx
L
L
H
[1]
Function table
[1]
Output
nAx
L
H
X
nYx
L
H
Z
transparent
transparent
High-impedance
Operating mode
X = don’t care;
Z = High-impedance OFF-state;
H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
9397 750 15122
Parameter
supply voltage
input diode current
input voltage
output diode current
Conditions
V
I
< 0 V
[2]
Min
−0.5
−18
−1.2
−50
Max
+7.0
-
+7.0
-
Unit
V
mA
V
mA
V
O
< 0 V
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 2 June 2005
5 of 16
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