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74LVC1G74DP-Q100H

产品描述Flip Flops 74LVC1G74DP-Q100/TSSOP8/REEL 7
产品类别逻辑    逻辑   
文件大小798KB,共18页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
标准
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74LVC1G74DP-Q100H概述

Flip Flops 74LVC1G74DP-Q100/TSSOP8/REEL 7

74LVC1G74DP-Q100H规格参数

参数名称属性值
Brand NameNXP Semiconductor
是否Rohs认证符合
厂商名称NXP(恩智浦)
零件包装代码TSSOP
包装说明3 MM, PLASTIC, SOT505-2, TSSOP-8
针数8
制造商包装代码SOT505-2
Reach Compliance Codecompliant

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74LVC1G74-Q100
Single D-type flip-flop with set and reset; positive edge trigger
Rev. 3 — 9 December 2016
Product data sheet
1. General description
The 74LVC1G74-Q100 is a single positive edge triggered D-type flip-flop. It has individual
data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary
Q and Q outputs.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing damaging backflow current through the device
when it is powered down.
The set and reset are asynchronous active LOW inputs and operate independently of the
clock input. Information on the data input is transferred to the Q output on the
LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time
prior to the LOW-to-HIGH clock transition for predictable operation. Schmitt trigger action
at all inputs makes the circuit highly tolerant of slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V

74LVC1G74DP-Q100H相似产品对比

74LVC1G74DP-Q100H 74LVC1G74GD-Q100H 74LVC1G74DC-Q100H
描述 Flip Flops 74LVC1G74DP-Q100/TSSOP8/REEL 7 Flip Flops Sngl Dtype flipflop positive edgetrigger Flip Flops 74LVC1G74DC-Q100/VSSOP8/REEL 7
Brand Name NXP Semiconductor NXP Semiconductor NXP Semiconductor
是否Rohs认证 符合 符合 符合
厂商名称 NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
零件包装代码 TSSOP SON SSOP
包装说明 3 MM, PLASTIC, SOT505-2, TSSOP-8 3 X 2 MM, 0.50 MM PITCH, 0.50 MM HEIGHT, PLASTIC, SOT996-2, XSON-8 2.30 MM , PLASTIC, MO-187, SOT765-1, VSSOP-8
针数 8 8 8
制造商包装代码 SOT505-2 SOT996-2 SOT765-1
Reach Compliance Code compliant compliant compliant

 
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