CML Microcircuits
COMMUNICATION SEMICONDUCTORS
D/865/3 November 2005
CMX865
FSK Modem and
DTMF Codec
Provisional Issue
Features
•
V.23 1200/75, 1200/1200, 75, 1200 bps FSK
•
Bell 202 1200/150, 1200/1200, 150, 1200 bps FSK
•
Bell 103 300/300 bps FSK
•
Low Voice Falsing DTMF Decoder
•
DTMF/Tones Transmit and Receive
•
Low Power - High Performance
•
Software and Hardware Compatible with CMX86x
Family of Wireline Products
Applications
•
Wireless Local Loops
•
SMS Phones
•
Security Systems
•
Remote Utility Meter Reading
•
Industrial Control Systems
•
Pay-Phones
•
Set-Top Boxes
1.
Brief Description
The CMX865 is a multi-standard modem for use in telephone based information and telemetry systems.
Control of the device is via a simple high speed serial bus, compatible with most types of µC serial
interface. The data transmitted and received by the modem is also transferred over the same serial bus.
On-chip programmable Tx and Rx USARTs are provided for use with asynchronous data and allow
unformatted synchronous data to be received or transmitted as 8-bit words.
A high-quality DTMF decoder with excellent immunity to falsing on voice and a standard DTMF encoder
are included. Alternatively, these blocks can be used to transmit and detect user-specific, programmed
single and dual-tone signals, call progress signals or modem calling and answering tones.
Flexible line driver and receive hybrid circuits are integrated on chip, requiring only passive external
components to build a 2 or 4-wire line interface.
The device also features a Hook Switch Relay Drive output and a Ring Detector circuit which continues to
function when the device is in the powersave mode, providing an interrupt which can be used to wake up
the host µController when line voltage reversal or ringing is detected.
The CMX865 operates from a single 3.0 to 3.6V supply over a temperature range of -40°C to +85°C and
is available in a 24-pin SOIC package.
©
2005 CML Microsystems Plc
FSK Modem and DTMF Codec
CMX865
CONTENTS
Section
1.
2.
3.
4.
Page
Brief Description ..................................................................................... 1
Block Diagram ......................................................................................... 3
Signal List ................................................................................................ 4
External Components............................................................................. 5
4.1
Ring Detector Interface ............................................................. 6
4.2
Line Interface.............................................................................. 7
General Description.............................................................................. 10
5.1
Tx USART.................................................................................. 11
5.2
FSK Modulator ......................................................................... 12
5.3
Tx Filter and Equaliser ............................................................ 12
5.4
DTMF/Tone Generator ............................................................. 12
5.5
Tx Level Control and Output Buffer....................................... 12
5.6
Rx DTMF/Tones Detectors ...................................................... 13
5.7
Rx Modem Filtering and Demodulation ................................. 14
5.8
Rx Modem Pattern Detectors.................................................. 14
5.9
Rx Data Register and USART ................................................. 15
5.10
C-BUS Interface........................................................................ 16
5.10.1 General Reset Command ........................................... 16
5.10.2 General Control Register ........................................... 18
5.10.3 Transmit Mode Register ............................................. 20
5.10.4 Receive Mode Register............................................... 23
5.10.5 Tx Data Register.......................................................... 25
5.10.6 Rx Data Register ......................................................... 25
5.10.7 Status Register............................................................ 26
5.10.8 Programming Register ............................................... 29
Application Notes ................................................................................. 32
Performance Specification................................................................... 33
7.1
Electrical Performance ............................................................ 33
7.1.1 Absolute Maximum Ratings....................................... 33
7.1.2 Operating Limits ......................................................... 33
7.1.3 Operating Characteristics.......................................... 34
7.2
Packaging ................................................................................. 41
5.
6.
7.
It is always recommended that you check for the latest product datasheet version from the
Datasheets page of the CML website: [www.cmlmicro.com].
©
2005 CML Microsystems Plc
2
D/865/3
FSK Modem and DTMF Codec
CMX865
2.
Block Diagram
Figure 1 Block Diagram
©
2005 CML Microsystems Plc
3
D/865/3
FSK Modem and DTMF Codec
CMX865
3.
Signal List
CMX865D2
Pin No.
1
2
3
Signal
Name
XTALN
XTAL/CLOCK
RDRVN
Type
O/P
I/P
O/P
The output of the on-chip Xtal oscillator inverter.
The input to the oscillator inverter from the Xtal
circuit or external clock source.
Relay drive output, low resistance pull down to
V
SS
when active and medium resistance pull up
to V
DD
when inactive.
The negative supply rail (ground).
Schmitt trigger input to the Ring signal detector.
Connect to V
SS
if Ring Detector not used.
Open drain output and Schmitt trigger input
forming part of the Ring signal detector. Connect
to V
DD
if Ring Detector not used.
The positive supply rail. Levels and thresholds
within the device are proportional to this voltage.
The output of the Rx Input Amplifier.
The inverting input to the Rx Input Amplifier
The non-inverting input to the Rx Input Amplifier
Internally
generated
bias
voltage
of
approximately V
DD
/2, except when the device is
in ‘Powersave’ mode when V
BIAS
will discharge
to V
SS
. Should be decoupled to V
SS
by a
capacitor mounted close to the device pins.
The inverted output of the Tx Output Buffer.
The non-inverted output of the Tx Output Buffer.
The C-BUS chip select input from the
µC.
The C-BUS serial data input from the
µC.
The C-BUS serial clock input from the
µC.
A 3-state C-BUS serial data output to the
µC.
This output is high impedance when not sending
data to the
µC.
A ‘wire-ORable’ output for connection to a
µC
Interrupt Request input. This output is pulled
down to V
SS
when active and is high impedance
when inactive. An external pullup resistor is
required i.e. R1 of Figure 2.
Description
4, 8, 12, 17, 21
5
6
V
SS
RD
RT
Power
I/P
BI
7, 16, 24
9
10
11
13
V
DD
RXAFB
RXAN
RXA
V
BIAS
Power
O/P
I/P
I/P
O/P
14
15
18
19
20
22
TXAN
TXA
CSN
COMMAND
DATA
SERIAL
CLOCK
REPLY DATA
O/P
O/P
I/P
I/P
I/P
T/S
23
IRQN
O/P
©
2005 CML Microsystems Plc
4
D/865/3
FSK Modem and DTMF Codec
CMX865
Notes:
I/P
O/P
BI
T/S
NC
=
=
=
=
=
Input
Output
Bidirectional
3-state Output
No Connection
4.
External Components
R1
X1
68kΩ
11.0592MHz
or 12.288MHz
C1, C2
C3, C4
C5
22pF
100nF
10uF
Resistors
±5%,
capacitors
±20%
unless otherwise stated.
Figure 2 Recommended External Components for a Typical Application
This device is capable of detecting and decoding small amplitude signals. To achieve this, V
DD
and V
BIAS
should be decoupled and the receive path protected from extraneous in-band signals. It is recommended
that the printed circuit board is laid out with a V
SS
ground plane in the CMX865 area to provide a low
impedance connection between the V
SS
pins and the V
DD
and V
BIAS
decoupling capacitors. The V
SS
connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and preferably be
part of the V
SS
ground plane to ensure reliable start up of the oscillator.
For best results, an Xtal oscillator design should drive the clock inverter input with signal levels of at least
40% of V
DD
peak-to-peak. Tuning-fork Xtals generally cannot meet this requirement. To obtain Xtal
oscillator design assistance, please consult your Xtal manufacturer.
©
2005 CML Microsystems Plc
5
D/865/3
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